hstl16919 NXP Semiconductors, hstl16919 Datasheet - Page 2

• Manufacturer Part Number: hstl16919
• Description: Hstl16919 9-bit To 18-bit Hstl To Lvttl Memory Address Latch With 12 Kohm Pull-up Resistor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FEATURES
DESCRIPTION
The HSTL16919 is a 9-bit to 18-bit D-type latch designed for
3.15 V to 3.45 V V
and the Q outputs provide LVTTL levels.
The HSTL16919 is particularly suitable for driving an address bus to
two banks of memory. Each bank of nine outputs is controlled with
its own latch-enable (LE) input.
Each of the nine D inputs is tied to the inputs of two D-type latches
that provide true data (Q) at the outputs. While LE is LOW the Q
outputs of the corresponding nine latches follow the D inputs. When
LE is taken HIGH, the Q outputs are latched at the levels set up at
the D inputs.
The HSTL16919 is characterized for operation from 0 C to +70 C.
ORDERING INFORMATION
T
amb
Type number
HSTL16919DGG
2004 Apr 15
Inputs meet JEDEC HSTL Std. JESD 8–6, and outputs meet
Level III specifications
12 k pull-up on D and LE inputs
ESD classification testing is done to JEDEC Standard JESD22.
Protection exceeds 2000 V to HBM per method A114.
Latch-up testing is done to JEDEC Standard JESD78, which
exceeds 100 mA.
Packaged in 48-pin plastic thin shrink small outline package
(TSSOP48)
9-bit to 18-bit HSTL to LVTTL memory address latch
with 12 kohm pull-up resistor
= 0 C to +70 C
CC
operation. The D inputs accept HSTL levels
Package
Name
TSSOP48
Description
plastic thin shrink small outline package; 48 leads; body width 6.1 mm
2
PIN CONFIGURATION
GND
GND
V
GND
GND
GND
GND
V
2Q9
1Q9
2Q1
1Q1
V
2LE
REF
1LE
D1
D2
D3
D4
D7
CC
D8
CC
D5
D6
D9
10
12
14
15
16
17
18
19
20
21
22
23
24
11
13
1
2
3
4
5
6
7
8
9
SW00768
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
HSTL16919
V
V
1Q2
2Q2
GND
1Q3
2Q3
V
1Q4
2Q4
GND
1Q5
2Q5
GND
1Q6
2Q6
V
1Q7
2Q7
GND
1Q8
2Q8
V
V
CC
CC
CC
CC
CC
CC
Version
SOT362-1
Product data