nvt2003 NXP Semiconductors, nvt2003 Datasheet

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nvt2003

Manufacturer Part Number
nvt2003
Description
Bidirectional Voltage-level Translator For Open-drain And Push-pull Applications
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features and benefits
The NVT2003/04/06 is a family of bidirectional voltage level translators operational from
1.0 V to 3.6 V (V
translations between 1.0 V and 5 V without the need for a direction pin in open-drain or
push-pull applications. Bit widths ranging from 3-bit to 6-bit are offered for level translation
application with transmission speeds < 33 MHz for an open-drain system with a 50 pF
capacitance and a pull-up of 197 .
When the An or Bn port is LOW, the clamp is in the ON-state and a low resistance
connection exists between the An and Bn ports. The low ON-state resistance (R
switch allows connections to be made with minimal propagation delay. Assuming the
higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is
limited to the voltage set by VREFA. When the An port is HIGH, the Bn port is pulled to the
drain pull-up supply voltage (V
seamless translation between higher and lower voltages selected by the user without the
need for directional control.
When EN is HIGH, the translator switch is on, and the An I/O are connected to the Bn I/O,
respectively, allowing bidirectional data flow between ports. When EN is LOW, the
translator switch is off, and a high-impedance state exists between ports. The EN input
circuit is designed to be supplied by V
power-up or power-down, EN must be LOW.
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
NVT2003/04/06
Bidirectional voltage-level translator for open-drain and
push-pull applications
Rev. 2 — 29 March 2011
Provides bidirectional voltage translation with no direction pin
Less than 1.5 ns maximum propagation delay
Allows voltage level translation between:
1.0 V V
1.2 V V
1.8 V V
2.5 V V
3.3 V V
ref(A)
ref(A)
ref(A)
ref(A)
ref(A)
ref(A)
and 1.8 V, 2.5 V, 3.3 V or 5 V V
and 1.8 V, 2.5 V, 3.3 V or 5 V V
and 3.3 V or 5 V V
and 5 V V
and 5 V V
) and 1.8 V to 5.5 V (V
ref(B)
ref(B)
pu(D)
) by the pull-up resistors. This functionality allows a
ref(B)
ref(B)
. To ensure the high-impedance state during
ref(B)
), which allow bidirectional voltage
ref(B)
ref(B)
Product data sheet
on
) of the

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nvt2003 Summary of contents

Page 1

... Rev. 2 — 29 March 2011 1. General description The NVT2003/04/ family of bidirectional voltage level translators operational from 1 3 translations between 1.0 V and 5 V without the need for a direction pin in open-drain or push-pull applications. Bit widths ranging from 3-bit to 6-bit are offered for level translation application with transmission speeds < ...

Page 2

... HXSON16U plastic thermal enhanced extremely thin small outline package; no leads; 16 terminals; UTLP based; body 1.35  3.3  0.5 mm VREFA A1 An Logic diagram of NVT2003/04/06 (positive logic) All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator VREFB NVT20xx ...

Page 3

... Transparent top view Pin configuration for HXSON12U All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator VREFB 8 NVT2003DP 002aae836 VREFB 002aae219 © NXP B.V. 2011. All rights reserved. ...

Page 4

... NVT2006BS 002aae222 Transparent top view Pin configuration for HVQFN16 All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator terminal 1 index area VREFA NVT2006BQ ...

Page 5

... NXP Semiconductors 5.2 Pin description Table 2. Symbol GND VREFA VREFB EN [1] 3-bit NVT2003 available in TSSOP10 package. [2] 4-bit NVT2004 available in HXSON12 package. [3] 6-bit NVT2006 available in TSSOP16, DHVQFN16, HVQFN16, HXSON16U packages. NVT2003_04_06 Product data sheet Pin description Pin [1] [2] NVT2003 NVT2004 ...

Page 6

... The NVT2003/04/06 can be used in level translation applications for interfacing devices or systems operating at different interface voltages with one another. The NVT2003/04/06 is ideal for use in applications where an open-drain driver is connected to the data I/Os. The NVT2003/04/06 can also be used in applications where a push-pull driver is connected to the data I/Os. 7.1 Enable and disable The NVT20xx has an EN input that is used to disable the device by setting EN LOW, which places all I/Os in the high-impedance state ...

Page 7

... least 1 V higher than V ref(B) the capacitor and the 200 k resistor on the EN pin. Typical application circuit (switch enable control) All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator [1] Min Typ V + 0.6 2.1 ...

Page 8

... However, if either output is totem-pole, data must be unidirectional or pu( connected to the processor core power supply ref(A) is set between 1.0 V and (V ref(A) . pu(D) All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator 200 kΩ EN VREFB B1 CHIPSET I CHIPSET I/O ...

Page 9

... V, but one could be at 3.0 V and the other at 3 one could be experiencing a power failure while the other domain is trying to operate. One of the NVT2003 three channel transistors is used as a second reference transistor with its B side connected to a voltage supply that is at least 1 V (and preferably 1 ...

Page 10

... V at stated current. OL Pull-up resistor value ( [1] Nominal +10 % Nominal 310 197 143 All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator 10 mA [1] [1] +10 % Nominal +10 % 341 465 512 217 295 325 158 215 237 ...

Page 11

... EN pass switch current ambient temperature  V  for best results in level shifting applications. ref(B) All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator Conditions Min 0.5 0.5 0.5 [1] 0.5 ...

Page 12

... An, Bn I(EN) An 4.5 V I( 4.5 V I(EN) behavior. I(EN) All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator [1] Min Typ Max 1 [2] - 11.5 13 [5] 1 2.4 5 ...

Page 13

... T (°C) amb 002aaf682 R on(typ) (Ω 100 T (°C) amb = 3.0 V I(EN) All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator −40 − I(EN ...

Page 14

... VREFA 1.5 V 002aaf347 Fig 14. Example of typical AC waveform (open 002aab845 All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator Conditions Min  (C [1] from (input (output) An  (C from (input ...

Page 15

... C (pF 2 All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator   5  = 0.250 ns. on L(tot) , which is typically small (ns ...

Page 16

... 2.5 scale (1) ( 0.30 0.23 3.1 3.1 0.5 0.15 0.15 2.9 2.9 REFERENCES JEDEC JEITA All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator θ detail 5.0 0.7 0.95 0.1 0.1 0.1 4.8 0.4 EUROPEAN ...

Page 17

... 2.6 2.1 1.45 0.45 2.5 2.0 1.35 0.40 0.4 2 0.2 2.4 1.9 1.25 0.35 References JEDEC JEITA - - - - - - All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator detail 0.30 0.25 0.1 0.05 0.05 0.05 0.20 European projection SOT973 sot973-2_po Issue date 10-03-23 10-03-25 © NXP B.V. 2011. All rights reserved. ...

Page 18

... 3.6 2.15 2.6 1.15 0.5 2.5 3.4 1.85 2.4 0.85 REFERENCES JEDEC JEITA MO-241 - - - All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator detail 0.5 0.05 0.1 0.1 0.05 0.3 EUROPEAN PROJECTION SOT763 ISSUE DATE ...

Page 19

... 2.5 scale (1) ( 3.1 1.75 3.1 1.75 0.5 1.5 2.9 1.45 2.9 1.45 REFERENCES JEDEC JEITA MO-220 - - - All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator detail 0.5 1.5 0.1 0.05 0.05 0.1 0.3 EUROPEAN PROJECTION SOT758 ...

Page 20

... 2.5 scale (1) ( 0.30 0.2 5.1 4.5 0.65 0.19 0.1 4.9 4.3 REFERENCES JEDEC JEITA MO-153 All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator detail 6.6 0.75 0.4 1 0.2 ...

Page 21

... 0.5 scale 3.1 1.4 0.5 0.35 0.4 2.8 2.9 1.3 0.3 0.15 REFERENCES JEDEC JEITA - - - All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator detail 0.09 0.1 0.05 0.05 0.1 0.00 EUROPEAN PROJECTION SOT985-1 C ...

Page 22

... Solder bath specifications, including temperature and impurities NVT2003_04_06 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator © NXP B.V. 2011. All rights reserved ...

Page 23

... Package reflow temperature (C) 3 Volume (mm ) < 350 260 260 250 Figure 23. All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator Figure 23) than a SnPb process, thus  350 220 220 350 to 2000 > 2000 260 260 250 ...

Page 24

... Human Body Model Inter-Integrated Circuit bus Input/Output Machine Model Pulse Repetition Rate Resistor-Capacitor network All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator peak temperature time 001aac844 © NXP B.V. 2011. All rights reserved ...

Page 25

... NXP Semiconductors 16. Revision history Table 13. Revision history Document ID Release date NVT2003_04_06 v.2 20110329 • Modifications: Section 2 “Features and • Table 1 “Ordering SOT984-1)” to “HXSON12 (version SOT973-2)” • Table 2 “Pin • Section 5.1.2 • Figure 3 • Figure 18 NVT2003_04_06 v.1 20101004 NVT2003_04_06 Product data sheet ...

Page 26

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator © NXP B.V. 2011. All rights reserved ...

Page 27

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 March 2011 NVT2003/04/06 Bidirectional voltage-level translator © NXP B.V. 2011. All rights reserved ...

Page 28

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 29 March 2011 Document identifier: NVT2003_04_06 ...

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