m95256 STMicroelectronics, m95256 Datasheet - Page 23
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m95256
Manufacturer Part Number
m95256
Description
256 Kbit Serial Spi Bus Eeprom With High Speed Clock
Manufacturer
STMicroelectronics
Datasheet
1.M95256.pdf
(43 pages)
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M95256, M95256-W, M95256-R
5.6.1
Figure 11. Page Write (WRITE) sequence
1. The most significant address bit (b15) is Don’t Care.
ECC (error correction code) and Write cycling
The M95256, M95256-W and M95256-R devices offer an ECC (error correction code) logic
which compares each 4-byte word with its associated 6 EEPROM bits of ECC. As a result, if
a single bit out of 4 bytes of data happens to be erroneous during a Read operation, the
ECC detects it and replaces it by the correct value. The read reliability is therefore much
improved by the use of this feature.
Note however that even if a single byte has to be written, 4 bytes are internally modified
(plus the ECC bits), that is, the addressed byte is cycled together with the three other bytes
making up the word. It is therefore recommended to write by word (4 bytes) in order to
benefit from the larger amount of Write cycles.
The M95256-W6 and M95256-R6 devices are qualified at 1 million (1 000 000) Write cycles,
using a cycling routine that writes to the device by multiples of 4-byte words.
S
C
D
S
C
D
7
32
0
6
33
1
5
34
Data Byte 2
2
4
Instruction
35 36 37 38 39 40 41 42
3
3
4
2
5
1
6
0
7
7
15
8
6
14 13
9 10
5
Data Byte 3
16-Bit Address
4
43
3
44 45 46 47
3
20 21 22 23 24 25 26 27
2
2
1
1
0
0
7
6
6
5
Data Byte N
5
Data Byte 1
4
4
3
3
28 29 30
2
2
1
Instructions
1
0
0
31
AI01796D
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