hyb18t512160af-5 Infineon Technologies Corporation, hyb18t512160af-5 Datasheet - Page 21

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hyb18t512160af-5

Manufacturer Part Number
hyb18t512160af-5
Description
512-mbit Ddr2 Sdram
Manufacturer
Infineon Technologies Corporation
Datasheet
Figure 2
Note:
1. RDQS / RDQS are enabled by EMRS(1) command.
2. If RDQS / RDQS is enabled, the DM function is
3. When enabled, RDQS & RDQS are used as strobe
Data Sheet
disabled
signals during reads.
Pin Configuration for ×8 components, P-TFBGA-60 (top view)
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21
4.
5. Ball position L8 is A13 for 512-Mbit and is Not
V
They are isolated on the device from
and
Connected on 256-Mbit.
DDL
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
V
and
SSQ
.
Pin Configuration and Block Diagrams
V
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SSDL
are power and ground for the DLL.
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512-Mbit DDR2 SDRAM
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09112003-SDM9-IQ3P
Rev. 1.3, 2005-01
V
DD
,
V
DDQ
,
V
SS

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