stc3800 Connor-Winfield VCXOs, stc3800 Datasheet - Page 6

• Manufacturer Part Number: stc3800
• Description: Integrated - Stratum 3e Timing Source
• Manufacturer: Connor-Winfield VCXOs

Absolute Maximum Ratings
Table 2
Recommended Operating Conditions & Electrical Characteristics
Table 3
Register Map
Table 4
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum rated
conditions for extended periods may affect device reliability. Devices should not be operated outside the Recommended Operating Conditions.
Note 2: LVTTL compatible
Symbol
Vdd2.5
Vdd3.3
AVdd2.5
V
T
Symbol
Vdd2.5
Vdd3.3
AVdd2.5
V
V
V
V
V
V
V
C
T
T
T
T
T
Icc (Vdd2.5)
Icc (Vdd3.3)
Icc (Avdd2.5) 2.5V analog supply current
Pd
Address
0x00
0x01
0x02
0x03
0x04
0x05
STG
HL
LH
RIP
RIN
A
IN
IH
IL
OH
OL
IL
OH
ID
IN
(3.3V)
(PECL)
(3.3V)
(PECL)
(3.3V)
(3.3V)
(PECL) High level input voltage (PECL inputs)
Parameter
Logic power supply voltage, 2.5V
Logic power supply voltage 3.3V
Analog power supply voltage, 2.5V
Logic input voltage, rel. to GND
Storage Temperature
Parameter
2.5V digital power supply voltage
3.3V digital power supply voltage
2.5V analog power supply voltage
High level input voltage
High level output voltage (I
Low level output voltage (I
Low level input voltage (PECL inputs)
Input capacitance
Clock fall time (TCXO, OCXO, VCXO)
Clock rise time (TCXO, OCXO, VCXO)
Input reference signal positive pulse width
Input reference signal negative pulse width
Operating Ambient Temperature Range
2.5V digital supply current
3.3V digital supply current
Reg Name
Chip_ID_Low
Chip_Revision
Bandwidth_PBO
Ctl_Mode
Op_Mode
Low level input voltage
PECL differential input voltage
Device power dissipation
Chip_ID_High
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved
OL
OH
Preliminary Data Sheet #: TM061
=10mA)
= -7mA)
Master Free Run, Locked, or Hold Over mode, or Slave mode
and frame/multi-frame sync pulse width mode control
Manual or automatic selection of Op_Mode,
0.9*Vdd3.3
Minimum
Minimum
BITS clock output frequency indication,
Bandwidth & Phase Build-Out option
0.86
1.49
-0.3
-0.3
-0.3
-0.3
-55
2.3
3.0
2.3
2.0
0.3
0.3
10
10
0
-
-
-
-
-
-
-
-
Chip revision number
High byte of chip ID
Low byte of chip ID
Description
Nominal
Nominal
2.5
3.3
2.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Page 6 of 48
Vdd3.3 + 0.5
Vdd3.3 + 0.3
Specifications subject to change without notice
Maximum
Maximum
Vdd3.3
2.125
2.72
110
500
200
3.0
4.0
4.0
2.7
3.6
2.7
0.8
0.4
2.0
10
70
50
5
5
-
-
-
Rev: P06
Units
Units
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
Volts
mA
mA
mA
nS
nS
nS
nS
°C
pF
°C
W
Date: 11/22/04
Notes
Notes
Type
R/W
R/W
R/W
R
R
R
1
1
1
1
1
2
2
2
2