lm5119psqx National Semiconductor Corporation, lm5119psqx Datasheet
lm5119psqx
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lm5119psqx Summary of contents
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... The device is avail- able in a power enhanced leadless LLP-32 package featuring an exposed die attach pad to aid thermal dissipation. Typical Application © 2010 National Semiconductor Corporation LM5119 Features ■ Emulated peak current mode control ■ ...
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... Connection Diagram Order Number LM5119PSQ LM5119PSQX LM5119PSQE www.national.com Top View 32–Lead LLP Package Type NSC Package Supplied As Drawing LLP-32 SQA32A 1000 Units on Tape and Reel LLP-32 SQA32A 4500 Units on Tape and Reel LLP-32 SQA32A 250 Units on Tape and Reel 2 30124002 ...
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Pin Descriptions Pin Name Description 1 VCC1 Bias supply pin. Locally decouple to PGND1 using a low ESR/ESL capacitor located as close to controller as possible. 2 LO1 Low side MOSFET gate drive output. Connect to the gate of the ...
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Pin Name Description 19 RAMP2 PWM ramp signal. An external resistor and capacitor connected between the SW2 pin, the RAMP2 pin and the AGND pin sets the channel2 PWM ramp slope. Proper selection of component values produces a RAMP2 signal ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN to AGND SW1, SW2 to AGND HB1 to SW1, HB2 to SW2 VCC1, VCC2 to AGND (Note 2) ...
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Symbol Parameter Error Amplifier V FB Reference Voltage REF FB Input Bias Current FB Disable Threshold COMP VOH COMP VOL A DC Gain OL f Unity Gain Bandwidth BW PWM Comparators t Forced HO Off-time HO(OFF) t Minimum HO On-time ...
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Symbol Parameter SWITCHING CHARACTERISTICS LO Fall to HO Rise Delay HO Fall to LO Rise Delay THERMAL T Thermal Shutdown SD Thermal Shutdown Hysteresis θ Junction to Ambient JA θ Junction to Case JC Note 1: Absolute Maximum Ratings are ...
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Typical Performance Characteristics HO Peak Driver Current vs Output Voltage Driver Dead Time vs VCC VCC vs I VCC www.national.com LO Peak Driver Current vs Output Voltage 30124003 Driver Dead Time vs Temperature 30124005 Switching Frequency vs R 30124007 8 ...
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Error Amp Gain and Phase vs Frequency 30124009 9 www.national.com ...
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Block Diagram www.national.com FIGURE 1. Block Diagram 10 30124010 ...
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Detailed Operating Description The LM5119 high voltage switching regulator features all of the functions necessary to implement an efficient dual chan- nel buck regulator that operates over a very wide input voltage range. The LM5119 may be configured as two ...
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Enable 2 The LM5119 contains an enable function allowing shutdown control of channel2, independent of channel1. If the EN2 pin is pulled below 2.0V, channel2 enters shutdown mode. If the EN2 input is greater than 2.5V, channel2 returns to normal ...
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The sample-and-hold DC level is derived from a measure- ment of the recirculating current flowing through the current sense resistor. The voltage across the sense resistor is sam- pled and held just prior to the onset of the next conduction ...
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Hiccup Mode Current Limiting To further protect the regulator during prolonged current limit conditions, an internal counter counts the PWM clock cycles during which cycle-by-cycle current limiting occurs. When the counter detects 256 consecutive cycles of current limiting, the regulator ...
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FIGURE 5. Maximum Duty Cycle vs Switching Frequency Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction temper- ature is exceeded. When activated, typically at 165°C, the controller is forced ...
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The performance of the converter will vary depending on the selected K value (See Table 1). For this example, 2.5 was chosen as the K factor to minimize the power loss in sense resistor R and the cross-talk between channels. ...
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INPUT CAPACITORS The regulator input supply voltage typically has high source impedance at the switching frequency. Good quality input ca- pacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the switch current during ...
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FIGURE 7. Feedback Configuration UVLO DIVIDER The UVLO threshold is internally set to 1.25V at the UVLO pin. The LM5119 is enabled when the system input voltage VIN causes the UVLO pin to exceed the threshold voltage of 1.25V. When ...
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Select a minimum value for the snubber capacitor that provides adequate damping of the spikes on the switch waveform at high load. A snubber may not be necessary with an optimized layout. ERROR AMPLIFIER COMPENSATION ...
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A good approximation of the location of the pole added The value of C was selected as 100pF for the design HF HF example. MISCELLANEOUS FUNCTIONS EN2 is left floating ...
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PCB Board Layout Recommendations The LM5119 consists of two integrated regulators operating almost independently. Crosstalk between the two regulators under certain conditions may be observed as switch jitter. This effect is common for any dual channel regulator. Cross- talk effects ...
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Physical Dimensions inches (millimeters) unless otherwise noted 32 Pin LLP NS Package Number SQA32A 23 www.national.com ...
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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...