lm5119psqx National Semiconductor Corporation, lm5119psqx Datasheet - Page 16

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lm5119psqx

Manufacturer Part Number
lm5119psqx
Description
Lm5119 Wide Input Range Dual Synchronous Buck Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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The performance of the converter will vary depending on the
selected K value (See
chosen as the K factor to minimize the power loss in sense
resistor R
between the two regulators under certain conditions may be
observed on the output as switch jitter.
The maximum output current capability (I
20~50% higher than the required output current, (8A at
V
example, 120% of 8A was chosen (9.6A). The current sense
resistor value can be calculated as:
Where V
A value of 10mΩ was chosen for R
be rated to handle the power dissipation at maximum input
voltage when current flows through the free-wheel MOSFET
for the majority of the PWM cycle. The maximum power dis-
sipation of R
During output short condition, the worst case peak inductor
current is limited to:
Cross Talk
Peak Inductor Current with Short Output
Condition
Inductor Size
Power Dissipation of Rs
Efficiency
OUT2
) to account for tolerances and ripple current. For this
CS(TH)
S
and the cross-talk between channels. Crosstalk
S
can be calculated:
is the current limit threshold voltage (120mV).
Table
1). For this example, 2.5 was
S
. The sense resistor must
TABLE 1. Performance Variation by K Factor
OUT(MAX)
) should be
Sub-harmonic
oscillation may occur
(12)
(13)
(14)
(15)
(16)
(17)
(18)
K < 1
16
Where t
100ns. The chosen inductor must be evaluated for this con-
dition, especially at elevated temperature where the satura-
tion current rating of the inductor may drop significantly. At the
maximum input voltage with a shorted output, the valley cur-
rent must fall below V
is allowed to turn on.
RAMP RESISTOR AND RAMP CAPACITOR
The value of ramp capacitor (C
to allow full discharge between cycles by the discharge switch
internal to the LM5119. A good quality, thermally stable ce-
ramic capacitor with 5% or less tolerance is recommended.
For this design the value of C
capacitor value of 820pF. With the inductor, sense resistor
and the K factor selected, the value of the ramp resistor
(R
The standard value of 73.2kΩ was selected.
OUTPUT CAPACITORS
The output capacitors smooth the inductor ripple current and
provide a source of charge during transient loading condi-
tions. For this design example, a 470µF electrolytic capacitor
with 10mΩ ESR was selected as the main output capacitor.
The fundamental component of the output ripple voltage is
approximated as:
Two 22µF low ERS / ESL ceramic capacitors are placed in
parallel with the 470µF electrolytic capacitor, to further reduce
the output voltage ripple and spikes.
RAMP
) can be calculated as:
ON(MIN)
Smaller
Higher
Higher
Lower
Lower
1 <— K —> 3
is the minimum HO on-time which is nominally
CS(TH)
/ R
Higher
Larger
Higher
Lower
Lower
S
RAMP
RAMP
before the high-side MOSFET
) should be less than 2nF
was set at the standard
Introduces
additional pole near
cross-over
frequency
K > 3
(19)
(20)
(21)
(22)
(23)

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