tmp88f846ug TOSHIBA Semiconductor CORPORATION, tmp88f846ug Datasheet - Page 213

• Manufacturer Part Number: tmp88f846ug
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note 6: After transmitting a password string, the external controller must not transmit only an end record. If receiving an end
Note 7: If the read protection is enabled or a password error occurs, TMP88F846UG stops UART communication and enters the
Note 8: If an error occurs during the reception of a password address or a password string, TMP88F846UG stops UART commu-
Note 9: To re-write data for the address of flash memory which has already written data ( include "FF" ), make sure to erase the
Description of RAM loader mode
Note 1: To rewrite data to Flash memory addresses at which data (including FFH) is already written, make sure to
comparison start address, TMP88F846UG stops UART communication and enters the halt condition. Therefore, when a
password error occurs, initialize TMP88F846UG by the
record after a password string, the device may not operate correctly.
halt condition. In this case, initialize TMP88F846UG by the
nication and enters the halt condition. In this case, initialize TMP88F846UG by the
PROM mode.
data first by the sector erase or chip erase, and then write new data to the flash memory.
1. The 1st through 4th bytes of the transmitted and received data contains the same data as in the flash
2. In the 5th byte of the received data contains the RAM loader command data (60H).
3. When th 5th byte of the received data contains the operation command data shown in Table 19-6, the
4. The 7th through m’th bytes of the transmitted and received data contain the same data as in the flash
5. The m’th + 1 through n’th - 2 bytes of the received data contain the binary data in the Intel Hex for-
6. The n’th - 1 and n’th bytes contain the checksum upper and lower bytes. For details on how to calcu-
7. After transmitting the checksum to the external controller, the boot program jumps to the RAM
memory writing mode.
device echoes back the value which is the same data in the 6th byte position (in this case, 60H). If the
5th byte does not contain the operation command data, the device enters the halt condition after send-
ing 3 bytes of operation command error code (63H).
memory writing mode.
mat. No received data is echoed back to the external controller. After receiving the start mark (3AH
for “:”) in the Intel Hex format, the device starts data record reception. Therefore, the received data
except 3AH is ignored until the start mark is received. After receiving the start mark, the device
receives the data record, that consists of data length, address, record type, write data and checksum.
The writing data of the data record is written into RAM specified by address. Since the device starts
checksum calculation after receiving an end record, the external controller should wait for the check-
sum after sending the end record. If a receiving error or Intel Hex format error occurs, the device
enters the halts condition without returning an error code to the external controller.
late the SUM, refer to " 19.8 Checksum (SUM) ". The checksum is calculated only when the end
record is detected and no receiving error or Intel Hex format error occurs. After sending the end
record, the external controller judges whether the transmission is completed correctly by receiving the
checksum sent by the device.
address that is specified by the first received data record.
erase the existing data by "sector erase" or "chip erase" before rewriting data.
Page 203
RESET
RESET
pin and reactivate the serial ROM mode.
pin and reactivate the serial PROM mode.
RESET
pin and reactivate the serial
TMP88F846UG