W83194R-17/-17A Winbond Electronics Corp America, W83194R-17/-17A Datasheet - Page 5

no-image

W83194R-17/-17A

Manufacturer Part Number
W83194R-17/-17A
Description
100MHz Sis 5595, 5598 Clock Gen.
Manufacturer
Winbond Electronics Corp America
Datasheet
5.2 CPU, SDRAM, PCI Clock Outputs, continued
PCICLK 0 / *FS2
PCICLK [1:4]
5.3 I2C Control Interface
SDATA
SDCLK
5.4 Fixed Frequency Outputs
REF0 / CPU3.3#_2.5
REF1
24MHz / *MODE
48MHz / *FS0
5.5 Power Pins
Vdd
Vddq2
Vddq2b
Vddq3
Vss
SYMBOL
SYMBOL
SYMBOL
SYMBOL
10,11,12,13
6,14,19, 30, 36
3,9,16,22,27,
- 5 -
PIN
PIN
PIN
23
24
46
25
26
33,39,45
8
2
PIN
42
48
1
OUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
Power supply for REF0 crystal and core logic.
Power supply for AGP1, REF1either 2.5V or 3.3V.
Power supply for CPUCLK [0:3], either 2.5V or 3.3V
Power supply for SDRAM, PCICLK and 48/24MHz
outputs.
Circuit Ground.
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
PCI clock during normal operation.
Low skew (< 250ps) PCI clock outputs.
Serial data of I
Serial clock of I
Internal 250kΩ pull-up.
Latched input for CPU3.3#_2.5 at initial power up.
Reference clock during normal operation.
Latched high - Vddq2b = 2.5V
Latched low
Internal 250kΩ pull-up.
Internal 250kΩ pull-up.
Latched input for MODE at initial power up. 24MHz
output for super I/O during normal operation.
Internal 250kΩ pull-up.
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks. 48MHz output for USB during normal
operation.
2
- Vddq2b = 3.3V
2
C 2-wire control interface
C 2-wire control interface
Publication Release Date: Sep. 1998
FUNCTION
FUNCTION
FUNCTION
FUNCTION
Revision 1.0

Related parts for W83194R-17/-17A