tc9404fng TOSHIBA Semiconductor CORPORATION, tc9404fng Datasheet
tc9404fng
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tc9404fng Summary of contents
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... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic Σ-∆ Modulation System DA Converter with Analog Filter TC9404FNG is a 2’nd order Σ-∆ modulation system 1-bit DA converter incorporating an 8-times over sampling digital filter and analog filter developed for digital audio equipment. Because the IC includes an analog filter, it can output a direct analog waveform, thus reducing the size and cost of the DA converter ...
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... Pin Assignment Block Diagram 2 TC9404FNG 2006-04-27 ...
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... Standard/double speed operation mode switching pin Standard operation at “H”, double speed operation at “L”. 22 DATA I Audio data input pin. 23 BCK I Bit clock input pin. 24 LRCK I LR clock input pin. Function 3 TC9404FNG Remarks Schmitt input Schmitt input Schmitt input 2006-04-27 ...
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... Also, as DATA has been designed so that the 16 bits before the change point of LRCK are regarded as valid data, the data must be input with Right-justified mode when the BCK fs, as shown in Figure 2b. Figure 2a Example of Input Timing Chart = 10~ (when in the 384 fs mode) 4 TC9404FNG 2006-04-27 ...
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... Table 1 Basic Characteristics of Digital Filter Standard operation Double speed operation The characteristics of the digital filter frequencies are shown below. Figure 3 Digital Filter Frequency Characteristics Pass-Band Ripple Transient Bandwidth ± 0.11dB 20.0 k~24.1 kHz ± 0.11dB 20.0 k~24.1 kHz 5 TC9404FNG Attenuation − 26dB or less − 26dB or less (fs = 44.1 kHz) 2006-04-27 ...
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... The internal structure of this is shown in Figure 6. 2’nd ∑-∆ converter − Z Figure 6 Σ-∆ Modulation DA Converter P/ = “H”) with the LATCH (BS) pin 44.1 − µ − Figure 5 Filter Characteristics − (Z) 6 TC9404FNG OFF (kHz µs 2 2006-04-27 ...
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... The Σ - ∆ modulation clock has been designed to operate at 192 fs. The noise shaping characteristics are shown in Figure 7. Figure 7 Noise Shaping Characteristics 6. Data Output Circuit The output circuit is equipped with a 3’rd analog low-pass filter. This enables direct analog signals to be acquired from the IC’s RO (pin 5) and LO (pin 9) output pins. Figure 8 Analog Filter Circuit 7 TC9404FNG 2006-04-27 ...
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... Pins 18, 19 and 20 are used as the mode setting pins shown in the table below when in the parallel mode. Table 3 Pin Names at the Parallel Mode Pin No. Pin Name EMP pin = “H” setting mode) and Function De-emphasis filter mode select pin De-emphasis filter control pin Soft mute control pin 8 TC9404FNG P/ S 2006-04-27 ...
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... Ensure that all control bits are set when the power supply is turned on. Table 5 Serial Mode Control Settings Serial Input Data AT0~6: Attenuation level setting µBS: De-emphasis mode select µEMP: De-emphasis ON/OFF switch Function Control Signal µBS D6 AT6 µEMP D5 AT5 ⎯ D4 AT4 ⎯ D3 AT3 ⎯ D2 AT2 ⎯ D1 AT1 ⎯ D0 AT0 9 TC9404FNG 2006-04-27 ...
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... The Digital De-emphasis setting mode is enabled when D7 = “H”. Controlled with µ EMP and µ BS signal. Table 7 Digital De-Emphasis Filter Setting µBS µEMP Mode Audio Output −0.000dB −0.069dB : −42.076dB − ∞ 44.1 OFF 10 TC9404FNG (kHz) 2006-04-27 ...
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... V DD ⎯ −35~85° −15~55° ⎯ Operation frequency MHz < < = 18.5 MHz V opr DA ⎯ 16.9 MHz ⎯ ⎯ ⎯ ⎯ TC9404FNG = Min Typ. Max Unit 4.5 5.0 5.5 V 4.5 5.0 5.5 4.5 5.0 5.5 2.7 3.0 5.5 2.7 3.0 5.5 V 2.7 3.0 5.5 ⎯ × ⎯ ...
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... LR ⎯ BCK duty cycle = 50% f BCK t r ⎯ LRCK, BCK (10%~90 ⎯ Edge → LRCK, DATA t BCK d Distortion Factor Gauge Filter Setting A Weight OFF ON 12 TC9404FNG Min Typ. Max Unit ⎯ −85 −80 dB ⎯ −85 −78 dB ⎯ ⎯ ⎯ ...
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... AC Characteristics Stipulated Point Application Circuit (input signal stipulation: LRCK, BCK, DATA) 13 TC9404FNG 2006-04-27 ...
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... Package Dimensions P-SSOP24-300-0.65A Weight: 0.14 g (typ.) (Note) Sn-Ag plate 14 TC9404FNG 2006-04-27 ...
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... R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath · solder bath temperature = 245°C · dipping time = 5 seconds · the number of times = once · use of R-type flux 021023_D 021023_B 060106_Q 15 TC9404FNG 060116EBA 021023_E 2006-04-27 ...