tb7102af TOSHIBA Semiconductor CORPORATION, tb7102af Datasheet - Page 7

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tb7102af

Manufacturer Part Number
tb7102af
Description
Buck Dc-dc Converter Ic
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Setting the Output Voltage
based on the reference voltage of the error amplifier, which is connected to the Feedback pin, V
be up to 10 kΩ or so, because an extremely large value R
V
depending on the load current conditions. For optimal operation, output voltage should be set to 0.8 V (typ.) at
the minimum and to (V
higher be used for R
Output Capacitor Selection
temperature, choose one with excellent temperature characteristics (such as the JIS B characteristic). As a rule
of thumb, its capacitance should be 10 μF or greater for applications where V
for applications where V
ripple voltage requirement and transient load response characteristics. Since the ceramic capacitor has a very
low ESR value, it helps reduce the output ripple voltage; however, because the ceramic capacitor provides less
phase margin, it should be thoroughly evaluated.
Component Values
These values are presented only as a guide.
layout.
FB
A resistive voltage divider is connected as shown in Figure 3 to set the output voltage; it is given by Equation 3
Use a ceramic capacitor as the output filter capacitor. Since a ceramic capacitor is generally sensitive to
The following values may need tuning depending on the TB7102AF’s input/output conditions and the board
Output Voltage
pin. If the difference between the input and output voltages is small, the output voltage may drop,
Setting
V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
L
V
OUT
OUT
=
=
= 3.7 μH
1
V
IN
MHz
f
5
osc
=
=
V
V
0
.
Δ ⋅
FB
V
8
300
OUT
3.3
V
I
L
FB1
×
1
V
mA
Inductance
1
+
IN
+
3.3 μH
3.3 μH
3.3 μH
3.3 μH
3.3 μH
V
OUT
and R
R
R
(@V
V
OUT
R
R
FB2
FB1
−1) V at the maximum. It is recommended that resistors with a precision of ±1% or
L
IN
3.3
FB1
FB2
5
IN
< 2.0 V. The capacitance should be set to an optimal value that meets the system's
V
FB2
V
= 5 V, Ta = 25°C)
······ (2)
······ (3)
.
Input Capacitance
10 μF
10 μF
10 μF
10 μF
10 μF
C
IN
I
L
7
0
Figure 3 Output Voltage Setting Resistors
Output Capacitance Feedback Resistor
FB1
Figure 2 Inductor Current Waveform
T =
incurs a delay due to parasitic capacitance at the
C
22 μF
22 μF
22 μF
10 μF
10 μF
OUT
f
osc
1
FB
L
X
OUT
1.2 kΩ
2.1 kΩ
3.0 kΩ
5.1 kΩ
7.5 kΩ
R
FB1
≥ 2.0 V, and 20 μF or greater
Feedback Resistor
T
V
ON
OUT
FB
TB7102AF
=
. R
2.4 kΩ
2.4 kΩ
2.4 kΩ
2.4 kΩ
2.4 kΩ
2008-05-22
Τ
R
FB2
FB1
V
V
OUT
IN
should

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