pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 124
pxf4333
Manufacturer Part Number
pxf4333
Description
Abm 3g Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXF4333.pdf
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5
5.1
The UTOPIA Interface to the PHY is ATMF UTOPIA Level 2 and Level 1 compliant. The
interface can be configured in Master or Slave Mode. Internal UTOPIA FIFOs guarantee
Head-of-Line blocking-free operation in both modes. Each interface direction (receive
and transmit) is independently clocked. The PHY side and backplane side UTOPIA
Interfaces are identical with minor exceptions as described in the subsequent chapters.
5.1.1
The UTOPIA Receive Interface supports up to 48 PHY addresses that can be
individually enabled. In Master Mode and Slave Mode, 48 PHYs are supported in four
groups (4*12 scheme).
Note: In Slave Mode, the interface responds to all enabled port addresses.
•
Figure 5-1
•
Figure 5-2
Data Sheet
Backpressure
Backpressure
Interface Description
UTOPIA L2 Interfaces (PHY side)
URXU: UTOPIA Receive Upstream (PHY side)
UTOPIA Receive Upstream Master Mode
UTOPIA Receive Upstream Slave Mode
4 cell FIFO
4 cell FIFO
URXDATU(15:0)
URXSOCU
URXPRTYU
URXCLKU
URXADRU(4:0)
URXENBU(3:0)
URXCLAVU(3:0)
URXDATU(15:0)
URXSOCU
URXPRTYU
URXCLKU
URXADRU(4:0)
URXENBU(3:0)
URXCLAVU(3:0)
124
Responding to up to 4*12 addresses
Interface Description
Addressing up to
4*12 PHYs:
Address
PHY 0
PXF 4333 V1.1
0..11
Address
PHY 1
0..11
Address
PHY 2
0..11
2001-12-17
ABM-3G
Address
PHY 3
0..11
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