atmega161-4pi ATMEL Corporation, atmega161-4pi Datasheet - Page 101

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atmega161-4pi

Manufacturer Part Number
atmega161-4pi
Description
8-bit Microcontroller With 16k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
Alternate Functions of Port D
1228D–AVR–02/07
has to be cleared (zero) or the pin has to be configured as an output pin. The Port D pins
are tri-stated when a reset condition becomes active, even if the clock is not running.
Table 34. DDDn Bits on Port D Pins
Notes:
The alternate pin configuration is as follows:
• RD
RD is the external Data memory read control strobe.
• WR
WR is the external Data memory write control strobe.
• OC1
OC1, Output compare match output: The PD5 pin can serve as an external output when
the Timer/Counter1 compare matches. The PD5 pin has to be configured as an output
(DDD5 set [one]) to serve this function. See “Timer/Counter1” on page 49 for further
details and how to enable the output. The OC1 pin is also the output pin for the PWM
mode timer function.
• TOSC1/TOSC2
When the AS2 bit in ASSR is set (one) to enable asynchronous clocking of
Timer/Counter2, pins PD5 and PD4 are disconnected from the port. In this mode, a
crystal Oscillator is connected to the pins and the pins cannot be used as I/O pins.
• INT1
INT1, External Interrupt source 1: The PD3 pin can serve as an external interrupt source
to the MCU. See “MCU Control Register – MCUCR” on page 34 for further details.
• INT0
INT0, External Interrupt source 0: The PD2 pin can serve as an external interrupt source
to the MCU. See “MCU Control Register – MCUCR” on page 34 for further details.
• TXD0
Transmit Data (Data output pin for the UART0). When the UART0 Transmitter is
enabled, this pin is configured as an output regardless of the value of DDRD1.
• RXD0
Receive Data (Data input pin for the UART0). When the UART Receiver is enabled, this
pin is configured as an input regardless of the value of DDRD0. When the UART0 forces
this pin to be an input, a logical “1” in PORTD0 will turn on the internal pull-up.
DDDn
0
0
1
1
Port D, Bit 7
1. n: 7,6…0, pin number
Port D, Bit 6
Port D, Bit 5
Port D, Bit 3
Port D, Bit 2
Port D, Bit 1
Port D, Bit 0
PORTDn
0
1
0
1
Port D, Bits 5 and 4
Output
Output
Input
Input
I/O
Pull-up
Yes
No
No
No
(1)
Comment
Tri-state (high-Z)
PDn will source current if ext. pulled low.
Push-pull Zero Output
Push-pull One Output
ATmega161(L)
101

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