atmega161-4pi ATMEL Corporation, atmega161-4pi Datasheet - Page 46
atmega161-4pi
Manufacturer Part Number
atmega161-4pi
Description
8-bit Microcontroller With 16k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA161-4PI.pdf
(159 pages)
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ATmega161(L)
Figure 33. Effects of Unsynchronized OCR Latching in Up/Down Mode
Figure 34. Effects of Unsynchronized OCR Latching in Overflow Mode.
Note:
During the time between the write and the latch operation, a read from the Output Com-
pare Registers will read the contents of the temporary location. This means that the
most recently written value always will read out of OCR0 and OCR2.
When the Output Compare Register contains $00 or $FF, and the up/down PWM mode
is selected, the output PB0(OC0/PWM0)/PB1(OC2/PWM2) is updated to low or high on
the next compare match according to the settings of COMn1/COMn0. This is shown in
Table 13. In overflow PWM mode, the output PB0(OC0/PWM0)/PB1(OC2/PWM2) is
held low or high only when the Output Compare Register contains $FF.
Table 13. PWM Outputs OCRn = $00 or $FF
Note:
Compare Value changes
COMn1
n = 0 or 2 (Figure 33 and Figure 34)
1. n = 0 or 2
2. In overflow PWM mode, the table above is only valid for OCRn = $FF.
1
1
1
1
Compare Value changes
Unsynchronized OCn Latch
Synchronized OCn Latch
Synchronized OCn Latch
Unsynchronized OCn Latch
COMn0
0
0
1
1
Compare Value changes
Glitch
Compare Value changes
OCRn
(1)(2)
$FF
$FF
$00
$00
Glitch
Counter Value
Compare Value
PWM Output OCn
Counter Value
Compare Value
PWM Output OCn
Counter Value
Compare Value
PWM Output OCn
Counter Value
Compare Value
PWM Output OCn
Output PWMn
H
H
L
L
1228D–AVR–02/07
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