atmega161-4pi ATMEL Corporation, atmega161-4pi Datasheet - Page 125

• Manufacturer Part Number: atmega161-4pi
• Description: 8-bit Microcontroller With 16k Bytes Of In-system Programmable Flash
• Manufacturer: ATMEL Corporation

Serial Downloading
1228D–AVR–02/07
Table 45. Parallel Programming Characteristics, T
10%
Notes:
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI
bus while RESET is pulled to GND. The serial interface consists of pins SCK, MOSI
(input) and MISO (output). After RESET is set low, the Programming Enable instruction
needs to be executed first, before program/erase operations can be executed.
When programming the EEPROM, an auto-erase cycle is built into the self-timed pro-
gramming operation (in the Serial mode ONLY) and there is no need to first execute the
Chip Erase instruction. The chip erase operation turns the contents of every memory
location in both the program and EEPROM arrays into $FF.
The program and EEPROM memory arrays have separate address spaces:
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be con-
nected across pins XTAL1 and XTAL2. The minimum low and high periods for the serial
clock (SCK) input are defined as follows:
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
DVXH
XHXL
XLDX
XLWL
BVXH
PHPL
PLBX
PLWL
BVWL
RHBX
WLWH
WLRL
WLRH
WLRH_CE
WLRH_FLASH
XLOL
OLDV
OHDZ
PP
$0000 to $1FFF for Program memory and $0000 to $01FF for EEPROM memory.
Low: > 2 XTAL1 clock cycles
High: > 2 XTAL1 clock cycles
(1)(2)(3)
1. t
2. t
3. t
WLRH_CE
WLRH_FLASH
WLRH
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
BS1 Valid before XTAL1 High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
PAGEL Low to WR Low
BS1 Valid to WR Low
BS1 Hold after RDY/BSY High
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
WR Low to RDY/BSY High for Write Flash
XTAL1 Low to OE Low
OE Low to DATA Valid
OE High to DATA Tri-stated
is valid for the Write EEPROM, Write Fuse bits and Write Lock bits commands.
is valid for the Chip Erase command.
is valid for the Write Flash command.
Parameter
(1)
(2)
(3)
A
= 25°C ± 10%, V
ATmega161(L)
11.5
Min
67
67
67
67
67
67
67
67
67
67
67
16
67
0
1
8
Typ
20
Max
12.5
250
2.5
1.7
28
14
20
CC
= 5V ±
Units
ms
ms
ms
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
V
125