p89lpc9321fdh NXP Semiconductors, p89lpc9321fdh Datasheet - Page 31
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p89lpc9321fdh
Manufacturer Part Number
p89lpc9321fdh
Description
8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb 3 V Byte-erasable ?ash With 512-byte Data Eeprom
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC9321FDH.pdf
(70 pages)
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NXP Semiconductors
P89LPC9321_1
Product data sheet
7.19.1 Reset vector
7.20.1 Mode 0
7.20.2 Mode 1
7.20.3 Mode 2
7.20.4 Mode 3
7.20.5 Mode 6
7.20 Timers/counters 0 and 1
Following reset, the P89LPC9321 will fetch instructions from either address 0000H or the
Boot address. The Boot address is formed by using the boot vector as the high byte of the
address and the low byte of the address = 00H.
The boot address will be used if a UART break reset occurs, or the non-volatile boot
status bit (BOOTSTAT.0) = 1, or the device is forced into ISP mode during power-on (see
P89LPC9321 User manual ). Otherwise, instructions will be fetched from address 0000H.
The P89LPC9321 has two general purpose counter/timers which are upward compatible
with the standard 80C51 Timer 0 and Timer 1. Both can be configured to operate either as
timers or event counters. An option to automatically toggle the T0 and/or T1 pins upon
timer overflow has been added.
In the ‘Timer’ function, the register is incremented every machine cycle.
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T0 or T1. In this function, the external input is sampled
once during every machine cycle.
Timer 0 and Timer 1 have five operating modes (Modes 0, 1, 2, 3 and 6). Modes 0, 1, 2
and 6 are the same for both Timers/Counters. Mode 3 is different.
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a divide-by-32 prescaler. In this mode, the Timer register is configured as a
13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.
Mode 2 configures the Timer register as an 8-bit Counter with automatic reload. Mode 2
operation is the same for Timer 0 and Timer 1.
When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit
counters and is provided for applications that require an extra 8-bit timer. When Timer 1 is
in Mode 3 it can still be used by the serial port as a baud rate generator.
In this mode, the corresponding timer can be changed to a PWM with a full period of
256 timer clocks.
Rev. 01 — 9 December 2008
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC9321
© NXP B.V. 2008. All rights reserved.
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