p87c453ebaa NXP Semiconductors, p87c453ebaa Datasheet - Page 8

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p87c453ebaa

Manufacturer Part Number
p87c453ebaa
Description
80c51 8-bit Microcontroller Family 8k/256 Otp/rom, Expanded I/o
Manufacturer
NXP Semiconductors
Datasheet

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Table 2. Interrupt Table
1998 Apr 23
PRIORITY
POLLING
80C51 8-bit microcontroller family
8K/256 OTP/ROM, expanded I/O
1
2
3
4
5
6
7
BIT
IP.7
IP.6
IP.5
IP.4
IP.3
IP.2
IP.1
IP.0
BIT
PCON.7
PCON.6
PCON.5
PCON.4
PCON.3
PCON.2
PCON.1
PCON.0
If logic 1s are written to PD and IDL at the same time, PD takes precedence.
INTO
Timer0
INT1
Timer1
Port 6
Serial I/O
Port 6
PCON (87H)
SOURCE
SYMBOL
POB
PIB
PS
PT1
PX1
PT0
PX0
SYMBOL
SMOD1
SMOD0
POF
GF1
GF0
PD
IDL
IE0
TF0
IE1
TF1
OBF
RI,TI
IBF
BITS/FLAG
REQUEST
FUNCTION
Reserved.
Defines the Output Buffer Full interrupt (IOB) priority level. POB=1 programs it to the higher priority level.
Defines the Input Buffer Full interrupt (IIB) priority level. PIB=1 programs it to the higher priority level.
Defines the Serial Port interrupt priority level. PS=1 programs it to the higher priority level.
Defines the Timer 1 interrupt priority level. PT1=1 programs it to the higher priority level.
Defines the External Interrupt 1 priority level. PX1=1 programs it to the higher priority level.
Enables or disables the Timer 0 interrupt priority level. PT0=1 programs it to the higher priority level.
Defines the External Interrupt 0 priority level. PX0=1 programs it to the higher priority level.
MSB
SMOD1
FUNCTION
Double Baud rate bit. When set to a 1 and Timer 1 is used to generate baud rate, and the Serial Port
is used in modes 1, 2, or 3.
If set to 1, SCON.7 will be the Framing Error bit (FE). If PCON.6 is cleared, SCON.7 will be SM0.
Reserved.
Power Off Flag is set during power on of V
if a warm start has occurred.
General-purpose flag bit.
General-purpose flag bit.
Power-Down bit. Setting this bit activates power-down mode. It can only be set if input EW is high.
Idle mode bit. Setting this bit activates the idle mode.
7
SMOD2
POB
03H highest priority
0BH
13H
1BH
33H
23H
2BH lowest priority
6
Figure 3. 8XC453 Interrupt Priority (IP) Register
Figure 4. Power Control Register (PCON)
ADDRESS
VECTOR
PIB
5
POF
PS
4
8
GF1
PT1
3
CC
. If then cleared by software, it can be used to determine
GF0
PX1
2
PT0
PD
1
PX0
IDL
0
LSB
83C453/87C453
Preliminary specification
SU00565
SU00564

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