lpc2468fet208 NXP Semiconductors, lpc2468fet208 Datasheet - Page 24

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lpc2468fet208

Manufacturer Part Number
lpc2468fet208
Description
Lpc2468 Single-chip 16-bit/32-bit Micro; 512 Kb Flash, Ethernet, Can, Isp/iap, Usb 2.0 Device/host/otg, External Memory Interface
Manufacturer
NXP Semiconductors
Datasheet

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Table 4.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Pad provides special analog functionality.
[11] Pad provides special analog functionality.
[12] Pad provides special analog functionality.
[13] Pad provides special analog functionality.
[14] Pad provides special analog functionality.
7. Functional description
LPC2468_2
Preliminary data sheet
Symbol
V
NC
V
V
VREF
VBAT
DD(3V3)
DD(DCDC)(3V3)
DDA
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a ADC input,
digital section of the pad is disabled.
5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,
digital section of the pad is disabled.
Open-drain 5 V tolerant digital I/O I
functionality. When power is switched off, this pin connected to the I
Pad provides digital I/O and USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and
Low-speed mode only).
5 V tolerant pad with 5 ns glitch filter providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad with 20 ns glitch filter providing digital I/O function with TTL levels and hysteresis.
Pad provides special analog functionality.
Pad provides special analog functionality.
Pin description
7.1 Architectural overview
Pin
15, 60,
71, 89,
112,
125,
146,
165,
181,
198
30, 117,
141
26, 86,
174
20
24
38
[14]
[14]
[14]
The LPC2468 microcontroller consists of an ARM7TDMI-S CPU with emulation support,
the ARM7 local bus for closely coupled, high-speed access to the majority of on-chip
memory, the AMBA AHB interfacing to high-speed on-chip peripherals and external
memory, and the AMBA APB for connection to other on-chip peripheral functions. The
microcontroller permanently configures the ARM7TDMI-S processor for little-endian byte
order.
[11]
[12]
[13]
…continued
Ball
G3, P6,
P8, U13,
P17,
K16,
C17,
B13, C9,
D7
J4, L14,
G14
H4, P11,
D11
G4
K1
M3
[14]
[11]
2
[14]
[14]
C-bus 400 kHz specification compatible pad. It requires an external pull-up to provide output
[13]
[12]
Type
I
I
I
I
I
I
Rev. 02 — 16 October 2007
Description
3.3 V supply voltage: This is the power supply voltage for the I/O ports.
Not Connected pins: These pins must be left unconnected (floating).
3.3 V DC-to-DC converter supply voltage: This is the power supply for
the on-chip DC-to-DC converter.
analog 3.3 V pad supply voltage: This should be nominally the same
voltage as V
This voltage is used to power the ADC and DAC.
ADC reference: This should be nominally the same voltage as V
but should be isolated to minimize noise and error. The level on this pin is
used as a reference for ADC and DAC.
RTC power supply: 3.3 V on this pin supplies the power to the RTC.
DD(3V3)
2
C-bus is floating and does not disturb the I
but should be isolated to minimize noise and error.
Fast communication chip
2
LPC2468
C lines.
© NXP B.V. 2007. All rights reserved.
DD(3V3)
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