lh79520 NXP Semiconductors, lh79520 Datasheet - Page 30

• Manufacturer Part Number: lh79520
• Description: Lh79520 System-on-chip
• Manufacturer: NXP Semiconductors

LH79520
NOTES:
1. INTR[5:0] are asynchronous signals. Interrupts must be held Active until serviced in Level Sensitive Mode,
2. nDACK0, DACK1 and DREQ[1:0] are asynchronous signals. They must be held Active until serviced,
EXTERNAL CLOCKS
NOTES:
1. PCLK is the period chosen for the internal peripheral
2. MAX. period is DC. See ‘Recommended Operating Conditions’.
30
nSDCS[1:0]
SDCLK
SSPFRM
SSPEN
SSPTX
SSPRX
INTR[5:0]
tCLKIN
tCLKINH
tCLKINL
tSSPCLK
tSSPCLKH SSPCLK HIGH Time
tSSPCLKL
tUCLK
tUCLKH
tUCLKL
SYMBOL
and held Active for a minimum of 20 ns in Edge Sensitive Mode.
for a minimum of 20 ns.
clock domain.
SIGNAL
Table 12. External Clocks AC Specifications
Figure 8. External Clock AC Timing
CLKIN Period
CLKIN HIGH Time
CLKIN LOW TIme
SSPCLK Period
SSPCLK LOW Time
UCLK
UCLK HIGH Time
UCLK LOW Time
Output 30 pF
Output 30 pF
Output 50 pF
Output 50 pF
Output 50 pF
TYPE LOAD DRIVE
tCLKINL
Input
Input
DESCRIPTION
tCLKIN
Table 11. AC Signal Characteristics (Cont’d)(Industrial)
8 mA
8 mA
2 mA
2 mA
2 mA
tCLKINH
tOVSSPFRM
tOVSSPOUT
tOVSSPENB
SYMBOL
tISSSPIN
SYNCHRONOUS SERIAL PORT (SSP)
tSDCLK
tOHSC
tOVSC
MIN.
6.66
2.8
2.8
0.4
0.4
0.4
0.4
1
1
Rev. 01 — 16 July 2007
NXP Semiconductors
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
UNIT
79520-57
ns
ns
ns
INTERRUPTS
19.37 ns
17 ns
MIN.
2 ns
Figure 9. Synchronous Serial I/F Clocks AC Timing
Figure 10. External UARTs/SIR Clock AC Timing
MAX.
11 ns
14 ns
14ns
14ns
tSSPCLKH
tUCLKH
tSSPCLK
SDCS Data Mask Valid
SDCS Data Mask Hold
SDRAM Clock Period
SSPFRM Output Valid,
Referenced to SSPCLK
SSPEN Output Valid,
Referenced to SSPCLK
SSP Transmit Valid
SSP Receive Setup
Note 1
tUCLK
Preliminary data sheet
tSSPCLKL
DESCRIPTION
tUCLKL
System-on-Chip
79520-58
79520-59