mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 459

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
To calculate the output period, take the selected clock source period for the channel of interest (A, B, SA,
or SB) and multiply it by the value in the period register for that channel:
For boundary case programming values, please refer to
Freescale Semiconductor
Reset
Reset
Reset
Reset
Reset
W
W
W
W
W
R
R
R
R
R
Left aligned output (CAEx = 0)
PWMx period = channel clock period * PWMPERx center aligned output (CAEx = 1)
PWMx period = channel clock period * (2 * PWMPERx)
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
0
7
7
7
7
7
Figure 15-21. PWM Channel Period Registers (PWMPER0)
Figure 15-22. PWM Channel Period Registers (PWMPER1)
Figure 15-23. PWM Channel Period Registers (PWMPER2)
Figure 15-24. PWM Channel Period Registers (PWMPER3)
Figure 15-25. PWM Channel Period Registers (PWMPER4)
6
0
6
0
6
0
6
0
6
0
6
6
6
6
6
MC9S12HZ256 Data Sheet, Rev. 2.05
5
0
5
0
5
0
5
0
5
0
5
5
5
5
5
4
0
4
0
4
0
4
0
4
0
4
4
4
4
4
Section 15.4.2.8, “PWM Boundary Cases.”
3
0
3
0
3
0
3
0
3
0
3
3
3
3
3
Chapter 15 Pulse-Width Modulator (PWM8B6CV1)
2
0
2
0
2
0
2
0
2
0
2
2
2
2
2
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
0
0
0
0
0
0
0
0
0
0
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