mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 543

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
CAPMOD
DBGBRK
Field
1:0
3
DBG Breakpoint Enable Bit — The DBGBRK bit controls whether the debugger will request a breakpoint based
on comparator A and B to the CPU upon completion of a tracing session. Please refer to
“Breakpoints,” for further details.
0 CPU break request not enabled
1 CPU break request enabled
Capture Mode Field — See
automatically inhibit redundant entries into capture memory. In detail mode, the debugger is storing address and
data for all cycles except program fetch (P) and free (f) cycles. In profile mode, the debugger is returning the
address of the last instruction executed by the CPU on each access of trace buffer address. Refer to
Section 19.4.2.6, “Capture
Table 19-3. DBGC1 Field Descriptions (continued)
Modes,” for more information.
MC9S12HZ256 Data Sheet, Rev. 2.05
Table 19-4
CAPMOD
Table 19-4. CAPMOD Encoding
00
01
10
11
for capture mode field definitions. In LOOP1 mode, the debugger will
Description
Description
PROFILE
LOOP1
DETAIL
Normal
Chapter 19 Debug Module (DBGV1)
Section 19.4.3,
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