mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 407

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mc9s12e256

Manufacturer Part Number
mc9s12e256
Description
Hcs12 Microcontrollers 16-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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To calculate the output frequency in center aligned output mode for a particular channel, take the selected
clock source frequency for the channel (A, B, SA, or SB) and divide it by twice the value in the period
register for that channel.
As an example of a center aligned output, consider the following case:
Shown below is the output waveform generated.
12.4.2.7
The PWM timer also has the option of generating 6-channels of 8-bits or 3-channels of 16-bits for greater
PWM resolution}. This 16-bit channel option is achieved through the concatenation of two 8-bit channels.
The PWMCTL register contains three control bits, each of which is used to concatenate a pair of PWM
channels into one 16-bit channel. Channels 4 and 5 are concatenated with the CON45 bit, channels 2 and 3
are concatenated with the CON23 bit, and channels 0 and 1 are concatenated with the CON01 bit.
When channels 4 and 5 are concatenated, channel 4 registers become the high-order bytes of the double
byte channel as shown in
registers become the high-order bytes of the double byte channel. When channels 0 and 1 are concatenated,
channel 0 registers become the high-order bytes of the double byte channel.
Freescale Semiconductor
E = 100 ns
PWMx frequency = clock (A, B, SA, or SB) / (2*PWMPERx)
PWMx duty cycle (high time as a% of period):
— Polarity = 0 (PPOLx = 0)
— Polarity = 1 (PPOLx = 1)
Clock source = bus clock, where bus clock = 10 MHz (100 ns period)
PPOLx = 0
PWMPERx = 4
PWMDTYx = 1
PWMx frequency = 10 MHz/8 = 1.25 MHz
PWMx period = 800 ns
PWMx duty cycle = 3/4 *100% = 75%
Duty cycle = [(PWMPERx-PWMDTYx)/PWMPERx] * 100%
Duty cycle = [PWMDTYx / PWMPERx] * 100%
PWM 16-Bit Functions
Change these bits only when both corresponding channels are disabled.
Figure 12-39. PWM Center Aligned Output Example Waveform
Figure
12-40. Similarly, when channels 2 and 3 are concatenated, channel 2
MC9S12E256 Data Sheet, Rev. 1.08
DUTY CYCLE = 75%
PERIOD = 800 ns
NOTE
Chapter 12 Pulse-Width Modulator (PWM8B6CV1)
E = 100 ns
407

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