mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 67

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mc9s12e256

Manufacturer Part Number
mc9s12e256
Description
Hcs12 Microcontrollers 16-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1.4.31
PS6 is a general purpose input or output pin. When the Serial Peripheral Interface (SPI) is enabled PS6
becomes the serial clock pin, SCK. While in reset and immediately out of reset the PS6 pin is configured
as a high impedance input pin. Consult
Chapter 9, “Serial Peripheral Interface (SPIV3)”
1.4.32
PS5 is a general purpose input or output pin. When the Serial Peripheral Interface (SPI) is enabled PS5 is
the master output (during master mode) or slave input (during slave mode) pin. While in reset and
immediately out of reset the PS5 pin is configured as a high impedance input pin Consult
Integration Module (PIM9E256V1)”
about pin configurations.
1.4.33
PS4 is a general purpose input or output pin. When the Serial Peripheral Interface (SPI) is enabled PS4 is
the master input (during master mode) or slave output (during slave mode) pin. While in reset and
immediately out of reset the PS4 pin is configured as a high impedance input pin. Consult
Integration Module (PIM9E256V1)”
about pin configurations.
1.4.34
PS3 is a general purpose input or output. When the Serial Communications Interface 1 (SCI1) transmitter
is enabled the PS3 pin is configured as the transmit pin, TXD1, of SCI1. While in reset and immediately
out of reset the PS3 pin is configured as a high impedance input pin. Consult
Module (PIM9E256V1)”
about pin configurations.
1.4.35
PS2 is a general purpose input or output. When the Serial Communications Interface 1 (SCI1) receiver is
enabled the PS2 pin is configured as the receive pin RXD1 of SCI1. While in reset and immediately out
of reset the PS2 pin is configured as a high impedance input pin. Consult
Module (PIM9E256V1)”
about pin configurations.
1.4.36
PS1 is a general purpose input or output. When the Serial Communications Interface 0 (SCI0) transmitter
is enabled the PS1 pin is configured as the transmit pin, TXD0, of SCI0. While in reset and immediately
out of reset the PS1 pin is configured as a high impedance input pin. Consult
Module (PIM9E256V1)”
about pin configurations.
Freescale Semiconductor
PS6 / SCK — Port S I/O Pin 6
PS5 / MOSI — Port S I/O Pin 5
PS4 / MISO — Port S I/O Pin 4
PS3 / TXD1 — Port S I/O Pin 3
PS2 / RXD1 — Port S I/O Pin 2
PS1 / TXD0 — Port S I/O Pin 1
and
and
and
Chapter 8, “Serial Communication Interface (SCIV4)”
Chapter 8, “Serial Communication Interface (SCIV4)”
Chapter 8, “Serial Communication Interface (SCIV4)”
and
and
MC9S12E256 Data Sheet, Rev. 1.08
Chapter 3, “Port Integration Module (PIM9E256V1)”
Chapter 9, “Serial Peripheral Interface (SPIV3)”
Chapter 9, “Serial Peripheral Interface (SPIV3)”
for information about pin configurations.
Chapter 1 MC9S12E256 Device Overview (MC9S12E256DGV1)
Chapter 3, “Port Integration
Chapter 3, “Port Integration
Chapter 3, “Port Integration
for information
for information
for information
Chapter 3, “Port
Chapter 3, “Port
for information
for information
and
67

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