mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 423

• Manufacturer Part Number: mc9s12ne64
• Description: Hcs12 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 16
Module Mapping Control (MMCV4)
16.1
This section describes the functionality of the module mapping control (MMC) sub-block of the S12 core
platform.
The block diagram of the MMC is shown in
The MMC is the sub-module which controls memory map assignment and selection of internal resources
and external space. Internal buses between the core and memories and between the core and peripherals is
controlled in this module. The memory expansion is generated in this module.
16.1.1
Freescale Semiconductor
EBI ALTERNATE WRITE DATA BUS
EBI ALTERNATE READ DATA BUS
•
EBI ALTERNATE ADDRESS BUS
READ & WRITE ENABLES
CPU WRITE DATA BUS
CPU READ DATA BUS
MODE INFORMATION
Registers for mapping of address space for on-chip RAM, EEPROM, and FLASH (or ROM)
memory blocks and associated registers
CPU ADDRESS BUS
BDM_UNSECURE
CLOCKS, RESET
CPU CONTROL
Introduction
STOP, WAIT
SECURE
Features
REGISTERS
Figure 16-1. MMC Block Diagram
MC9S12NE64 Data Sheet, Rev. 1.1
Figure
BUS CONTROL
SECURITY
MMC
16-1.
INTERNAL MEMORY
ADDRESS DECODE
EXPANSION
ALTERNATE WRITE DATA BUS (BDM)
ALTERNATE READ DATA BUS (BDM)
ALTERNATE ADDRESS BUS (BDM)
MEMORY SPACE SELECT(S)
PERIPHERAL SELECT
PORT K INTERFACE
CORE SELECT (S)
MMC_SECURE
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