mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 444

• Manufacturer Part Number: mc9s12ne64
• Description: Hcs12 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 17 Background Debug Module (BDMV4)
17.1.2
BDM is available in all operating modes but must be enabled before firmware commands are executed.
Some system peripherals may have a control bit which allows suspending the peripheral function during
background debug mode.
17.1.2.1
All of these operations refer to the part in run mode. The BDM does not provide controls to conserve power
during run mode.
17.1.2.2
If the part is in secure mode, the operation of the BDM is reduced to a small subset of its regular run mode
operation. Secure operation prevents access to FLASH or EEPROM other than allowing erasure.
17.2
A single-wire interface pin is used to communicate with the BDM system. Two additional pins are used
for instruction tagging. These pins are part of the multiplexed external bus interface (MEBI) sub-block and
all interfacing between the MEBI and BDM is done within the core interface boundary. Functional
descriptions of the pins are provided below for completeness.
444
•
•
•
•
•
•
•
•
•
•
•
Instruction tagging capability
Software control of BDM operation during wait mode
Software selectable clocks
When secured, hardware commands are allowed to access the register space in special single-chip
mode, if the FLASH and EEPROM erase tests fail.
Normal operation
General operation of the BDM is available and operates the same in all normal modes.
Special single-chip mode
In special single-chip mode, background operation is enabled and active out of reset. This allows
programming a system with blank memory.
Special peripheral mode
Emulation modes
General operation of the BDM is available and operates the same as in normal modes.
BKGD — Background interface pin
TAGHI — High byte instruction tagging pin
TAGLO — Low byte instruction tagging pin
External Signal Description
Modes of Operation
Regular Run Modes
Secure Mode Operation
BDM is enabled and active immediately out of reset. BDM can be disabled
by clearing the BDMACT bit in the BDM status (BDMSTS) register. The
BDM serial system should not be used in special peripheral mode.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor