cop8ame9 National Semiconductor Corporation, cop8ame9 Datasheet - Page 18

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cop8ame9

Manufacturer Part Number
cop8ame9
Description
8-bit Cmos Flash Microcontroller With 8k Memory, Dual Op Amps, Virtual Eeprom, Temperature Sensor, 10-bit A/d And Brownout Reset
Manufacturer
National Semiconductor Corporation
Datasheet

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Part Number:
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10.0 Functional Description
10.4.1 Virtual EEPROM
The Flash memory and the User ISP functions (see Section
5.7), provide the user with the capability to use the flash
program memory to back up user defined sections of RAM.
This effectively provides the user with the same nonvolatile
data storage as EEPROM. Management, and even the
amount of memory used, are the responsibility of the user,
however the flash memory read and write functions have
been provided in the boot ROM.
One typical method of using the Virtual EEPROM feature
would be for the user to copy the data to RAM during system
initialization, periodically, and if necessary, erase the page of
Flash and copy the contents of the RAM back to the Flash.
10.5 OPTION REGISTER
The Option register, located at address 0x1FFF in the Flash
Program Memory, is used to configure the user selectable
security, WATCHDOG, and HALT options. The register can
be programmed only in external Flash Memory programming
or ISP Programming modes. Therefore, the register must be
programmed at the same time as the program memory. The
contents of the Option register shipped from the factory read
00 Hex.
The format of the Option register is as follows:
Bits 7, 6 These bits are reserved and must be 0.
Bit 5
Bit 7
= 1
Reserved
Bit 6
Security enabled. Flash Memory read and write
are not allowed except in User ISP/Virtual E
mands. Mass Erase is allowed.
SECURITY
Bit 5
Bit 4
Reserved
Bit 3
WATCH
Bit 2
DOG
HALT
Bit 1
FIGURE 6. RAM Organization
(Continued)
2
FLEX
Bit 0
com-
18
Bits 4, 3 These bits are reserved and must be 0.
Bit 2
Bit 1
Bit 0
The COP8 assembler defines a special ROM section type,
CONF, into which the Option Register data may be coded.
The Option Register is programmed automatically by pro-
grammers that are certified by National.
The user needs to ensure that the FLEX bit will be set when
the device is programmed.
The following examples illustrate the declaration of the Op-
tion Register.
Syntax:
[label:].sect
= 0
= 1
= 0
= 1
= 0
= 1
= 0
Security disabled. Flash Memory read and write
are allowed.
WATCHDOG feature disabled. G1 is a general
purpose I/O.
WATCHDOG
WATCHDOG output with weak pullup.
HALT mode disabled.
HALT mode enabled.
Execution following RESET will be from Flash
Memory.
Flash Memory is erased. Execution following RE-
SET will be from Boot ROM with the MICROWIRE/
PLUS ISP routines.
.db
config, conf
value
feature
enabled.
;1 byte,
;configures
20006361
G1
pin
is

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