cop8ame9 National Semiconductor Corporation, cop8ame9 Datasheet - Page 23

• Manufacturer Part Number: cop8ame9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Dual Op Amps, Virtual Eeprom, Temperature Sensor, 10-bit A/d And Brownout Reset
• Manufacturer: National Semiconductor Corporation

10.0 Functional Description
flags. In addition to the SC and R/C instructions, ADC,
SUBC, RRC and RLC instructions affect the Carry and Half
Carry flags.
10.9.3 ICNTRL Register (Address X'00E8)
The ICNTRL register contains the following bits:
10.9.4 T2CNTRL Register (Address X'00C6)
The T2CNTRL register contains the following bits:
10.9.5 T3CNTRL Register (Address X'00B6)
The T3CNTRL register contains the following bits:
Unused
Bit 7
Bit 7
Bit 7
(Continued)
T3C3
T2C3
LPEN
T0PND
T0EN
µWPND MICROWIRE/PLUS interrupt pending
µWEN
T1PNDB Timer T1 Interrupt Pending Flag for T1B capture
T1ENB
T2C3
T2C2
T2C1
T2C0
T2PNDA Timer T2 Interrupt Pending Flag (Autoreload
T2ENA
T2PNDB Timer T2 Interrupt Pending Flag for T2B cap-
T2ENB
T3C3
T3C2
T3C1
T3C0
T3PNDA Timer T3 Interrupt Pending Flag (Autoreload
LPEN
T3C2
T2C2
L
Wake-up/Interrupt)
Timer T0 Interrupt pending
Timer T0 Interrupt Enable (Bit 12 toggle)
Enable MICROWIRE/PLUS interrupt
edge
Timer T1 Interrupt Enable for T1B Input capture
edge
Timer T2 mode control bit
Timer T2 mode control bit
Timer T2 mode control bit
Timer
modes 1 and 2, Timer T2 Underflow Interrupt
Pending Flag in timer mode 3
RA in mode 1, T2 Underflow in mode 2, T2A
capture edge in mode 3)
Timer T2 Interrupt Enable for Timer Underflow
or T2A Input capture edge
ture edge
Timer T2 Interrupt Enable for T2B Input capture
edge
Timer T3 mode control bit
Timer T3 mode control bit
Timer T3 mode control bit
Timer
modes 1 and 2, Timer T3 Underflow Interrupt
Pending Flag in timer mode 3
T0PND
T2C1
T3C1
Port
T2
T3
T0EN
T3C0
T2C0
Interrupt
Start/Stop
Start/Stop
µWPND
T3PNDA
T2PNDA
µWEN
Enable
T2ENA
T3ENA
control
control
T1PNDB
T2PNDB
T3PNDB
(Multi-Input
in
in
T1ENB
T2ENB
T3ENB
timer
timer
Bit 0
Bit 0
Bit 0
23
10.9.6 HSTCR Register (Address X'00AF)
The HSTCR register contains the following bits:
10.9.7 ITMR Register (Address X'00CF)
The ITMR register contains the following bits:
10.9.8 ENAD Register (Address X'00CB)
The ENAD register contains the following bits:
Bit 7
Bit 7
ADCH3 ADCH2
Bit 7
LSON
T2IDLE
T3ENA
T3PNDB Timer T3 Interrupt Pending Flag for T3B cap-
T3ENB
T2IDLE Allows T2 to run while in Idle Mode.
T3HS
T2HS
LSON
HSON
DCEN
CCKSEL Selects the high speed oscillator or the low
RSVD
ITSEL2
ITSEL1
ITSEL0
ADCH3 ADC channel select bit
ADCH2 ADC channel select bit
ADCH1 ADC channel select bit
ADCH0 ADC channel select bit
ADMOD Places the ADC in single-ended or differential
MUX
PSC
ADBSY Signifies that the ADC is currently busy perform-
HSON
Channel Select
Places Timer T3 in High Speed Mode.
Places Timer T2 in High Speed Mode.
mode.
Enables the ADC multiplexor output.
Switches the ADC clock between a divide by one
or a divide by sixteen of MCLK.
ing a conversion. When set by the user, starts a
conversion.
Turns the low speed oscillator on or off.
Turns the high speed oscillator on or off.
Selects the high speed oscillator or the low
speed oscillator as the Idle Timer Clock.
speed oscillator as the primary CPU clock.
This bit is reserved and must be 0.
Idle Timer period select bit.
Idle Timer period select bit.
Idle Timer period select bit.
RA in mode 1, T3 Underflow in mode 2, T3A
capture edge in mode 3)
Timer T3 Interrupt Enable for Timer Underflow
or T3A Input capture edge
ture edge
Timer T3 Interrupt Enable for T3B Input capture
edge
ADCH1
DCEN
Reserved
ADCH0
CCKS
EL
ADMOD
RSVD
Select
Mode
Mux Out Prescale
ITSEL2
MUX
ITSEL1
T3HS
PSC
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ADBSY
ITSEL0
T2HS
Busy
Bit 0
Bit 0
Bit 0