cop8ame9 National Semiconductor Corporation, cop8ame9 Datasheet - Page 20

• Manufacturer Part Number: cop8ame9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Dual Op Amps, Virtual Eeprom, Temperature Sensor, 10-bit A/d And Brownout Reset
• Manufacturer: National Semiconductor Corporation

www.national.com
10.0 Functional Description
10.7.1 External Reset
The RESET input, when pulled low, initializes the device.
The RESET pin must be held low for a minimum of one
instruction cycle to guarantee a valid reset.
RESET may also be used to cause an exit from the HALT
mode.
A recommended reset circuit for this device is shown in
Figure 8.
10.7.2 On-Chip Brownout Reset
The device generates an internal reset as V
V
device is held in the reset condition and the Idle Timer is
preset with 00Fx (240–256 t
greater than V
underflow of the Idle Timer, the internal reset is released and
the device will start executing instructions. This internal reset
will perform the same functions as external reset. Once V
is above V
instruction execution begins and the Idle Timer can be used
(Continued)
CC
WATCHDOG (if enabled):
The device comes out of reset with both the WATCHDOG
logic and the Clock Monitor detector armed, with the
WATCHDOG service window bits set and the Clock Moni-
tor bit set. The WATCHDOG and Clock Monitor circuits
are inhibited during reset. The WATCHDOG service win-
dow bits being initialized high default to the maximum
WATCHDOG service window of 64k T0 clock cycles. The
Clock Monitor bit being initialized high will cause a Clock
Monitor error following reset if the clock has not reached
the minimum specified frequency at the termination of
reset. A Clock Monitor error will cause an active low error
output on pin G1. This error output will continue until
16–32 T0 clock cycles following the clock frequency
reaching the minimum specified value, at which time the
G1 output will go high.
is less than the specified brownout voltage (V
FIGURE 8. Reset Circuit Using External Reset
bor
, and this initial Idle Timer time-out takes place,
bor
, the Idle Timer starts counting down. Upon
C
). When V
CC
reaches a value
20006312
CC
rises. While
bor
), the
CC
20
normally. If, however, V
is generated, and the Idle Timer is preset with 00Fx. The
device now waits until V
countdown starts over. The functional operation of the device
is guaranteed down to the V
One exception to the above is that the brownout circuit will
insert a delay of approximately 3 ms on power up or any time
the V
be held in Reset for the duration of this delay before the Idle
Timer starts counting the 240 to 256 t
soon as the V
mately 1.8V). This behavior is shown in Figure 9.
In Case 1, V
undefined until the supply is greater than approximately
1.0V. At this time the brownout circuit becomes active and
holds the device in RESET. As the supply passes a level of
about 1.8V, a delay of about 3 ms (t
Timer is preset to a value between 00F0 and 00FF (hex).
Once V
Timer is allowed to count down (t
Case 2 shows a subsequent dip in the supply voltage which
goes below the approximate 1.8V level. As V
V
back above the 1.8V level, t
supply rise time is longer for this case, t
V
greater than V
Case 3 shows a dip in the supply where V
V
V
goes back above V
The internal reset will not be turned off until the Idle Timer
underflows. The internal reset will perform the same func-
tions as external reset. The device is guaranteed to operate
at the specified frequency down to the specified brownout
voltage. After the underflow, the logic is designed such that
no additional internal resets occur as long as V
above the brownout voltage.
The device is relatively immune to short duration negative-
going V
filtering of V
works correctly. Power supply decoupling is vital even in
battery powered systems.
Refer to the device specifications for the actual V
Under no circumstances should the RESET pin be allowed
to float. If the external Reset feature is not being used, the
RESET pin should be connected directly to V
input may also be connected to an external pull-up resistor
or to other external circuitry. The output of the brownout reset
detector will always preset the Idle Timer to a value between
00F0 and 00FF (240 to 256 t
will be generated.
The contents of data registers and RAM are unknown fol-
lowing the on-chip reset.
bor
CC
bor
CC
, the internal RESET signal is asserted. When V
, but not below 1.8V. On-chip RESET is asserted when
rises above V
goes below V
CC
CC
drops below a voltage of about 1.8V. The device will
CC
is greater than V
CC
transients (glitches). It is essential that good
CC
bor
CC
be done to ensure that the brownout feature
.
rises from 0V and the on-chip RESET is
rises above the trigger voltage (approxi-
bor
bor
bor
and t
.
and t
CC
drops below V
CC
id
id
C
bor
bor
starts immediately when V
). At this time, the internal reset
d
is greater than V
starts as soon as the supply
and t
is started. Since the power
level.
id
).
d
) is started and the Idle
d
C
. This delay starts as
has expired, the Idle
d
bor
has expired before
, an internal reset
CC
CC
CC
. The RESET
drops below
drops below
bor
CC
bor
and the
remains
CC
voltage.
CC
rises
is