cop8ame9 National Semiconductor Corporation, cop8ame9 Datasheet - Page 51

• Manufacturer Part Number: cop8ame9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Dual Op Amps, Virtual Eeprom, Temperature Sensor, 10-bit A/d And Brownout Reset
• Manufacturer: National Semiconductor Corporation

15.0 A/D Converter
Note 13: These input channels are not available in this mode.
Note 14: Temperature Sensor cannot be used in this mode.
Note 15: Programmable Gain Amplifier must be bypassed when MUX = 1.
15.1.1.3 Mode Select
This 1-bit field is used to select the mode of operation (single
ended or differential) as shown in the following Table 24.
15.1.1.4 Prescaler Select
This 1-bit field is used to select one of two prescaler clocks
for the A/D Converter. The following Table 25 shows the
various prescaler options. Care must be taken, when select-
ing this bit, to not exceed the maximum frequency of the A/D
converter.
15.1.1.5 Busy Bit
The ADBSY bit of the ENAD register is used to control
starting and stopping of the A/D conversion. When ADBSY is
cleared, the prescale logic is disabled and the A/D clock is
turned off, drawing minimal power. Setting the ADBSY bit
starts the A/D clock and initiates a conversion based on the
ADCH3
ADMOD
0
1
1
1
1
1
1
1
1
0
1
PSC
TABLE 24. A/D Conversion Mode Selection
0
1
TABLE 25. A/D Converter Clock Prescale
Single Ended mode. This mode is required if
the temperature sensor is being selected.
Differential mode (programmable gain
amplifier must be bypassed)
ADCH2
TABLE 23. A/D Converter Channel Selection when the Multiplexor Output is Enabled
1
0
0
0
0
1
1
1
1
Select Bits
MCLK Divide by 16
MCLK Divide by 1
Clock Select
ADCH1
Mode
(Continued)
1
0
0
1
1
0
0
1
1
ADCH0
1
0
1
0
1
0
1
0
1
Temp Sensor (Note 14)
Single Ended Mode
51
Mode Select
Channel No.
ADMOD = 0
Mux Output
ADCH14 is
ADCH15 is
(Note 13)
A/D Input
(Note 13)
Not used
Not used
values currently in the ENAD register. Normal completion of
an A/D conversion clears the ADBSY bit and turns off the A/D
Converter.
When changing the channel and gain of the programmable
gain amplifier, it is necessary to wait before performing an
A/D conversion. This due to the amplifier settling time. See
the section on the Programmable Gain Amplifier for these
settling times.
If the user wishes to restart a conversion which is already in
progress, this can be accomplished only by writing a zero to
the ADBSY bit to stop the current conversion and then by
writing a one to ADBSY to start a new conversion. This can
be done in two consecutive instructions.
All multiplexor input channels should be internally gated off
when ADBSY = 0, unless MUX =1 or the programmable gain
amplifier is enabled. When MUX =1 or the programmable
gain amplifier is enabled, the internal path through the mul-
tiplexor to the pin and the input path for the A/D Converter
should be enabled.
15.1.2 A/D Result Registers
There are two result registers for the A/D converter: the high
8 bits of the result and the low 2-bits of the result. The format
of these registers is shown in Tables 26, 27. Both registers
are read/write registers, but in normal operation, the hard-
ware writes the value into the register when the conversion is
complete and the software reads the value. Both registers
are undefined upon Reset. They hold the previous value until
a new conversion overwrites them. When reading ADRSTL,
bits 5-0 will read as 0.
10
11
12
13
Channel Pairs (+, −)
Differential Mode
10, 11 (Note 15)
11, 10 (Note 15)
(Notes 13, 15)
(Notes 13, 15)
(Notes 13, 15)
Mux Output −
Mux Output +
Mode Select
ADMOD = 1
ADCH13 is
ADCH14 is
ADCH15 is
Not Used
A/D Input
Not used
Not used
Not used
Mux Output
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Enabled
MUX
1
1
1
1
1
1
1
1
1