cop8ccr9 National Semiconductor Corporation, cop8ccr9 Datasheet - Page 28

• Manufacturer Part Number: cop8ccr9
• Description: 8-bit Cmos Flash Microcontroller With 32k Memory, Virtual Eeprom, 10-bit A/d And Brownout
• Manufacturer: National Semiconductor Corporation

www.national.com
10.0 Functional Description
10.9.6 HSTCR Register (Address X'00AF)
The HSTCR register contains the following bits:
10.9.7 ITMR Register (Address X'00CF)
The ITMR register contains the following bits:
10.9.8 ENAD Register (Address X'00CB)
The ENAD register contains the following bits:
As described in 10.5 OPTION REGISTER, there is a bit,
FLEX, that controls whether the device exits RESET execut-
ing from the flash memory or the Boot ROM. The user must
program the FLEX bit as appropriate for the application. In
Bit 7
Bit 7
ADCH3 ADCH2
Bit 7
(Continued)
LSON
T3HS Places Timer T3 in High Speed Mode.
T2HS Places Timer T2 in High Speed Mode.
LSON
HSON
DCEN
CCKSEL Selects the high speed oscillator or the low
RSVD
ITSEL2
ITSEL1
ITSEL0
ADCH3 ADC channel select bit
HSON
Channel Select
Turns the low speed oscillator on or off.
Turns the high speed oscillator on or off.
Selects the high speed oscillator or the low
speed oscillator as the Idle Timer Clock.
speed oscillator as the primary CPU clock.
This bit is reserved and must be 0.
Idle Timer period select bit.
Idle Timer period select bit.
Idle Timer period select bit.
ADCH1
DCEN
Reserved
ADCH0
CCKS
EL
ADMOD
RSVD
Select
Mode
Mux Out Prescale
ITSEL2
MUX
FIGURE 13. Block Diagram of ISP
ITSEL1
T3HS
PSC
ITSEL0
ADBSY
T2HS
Busy
Bit 0
Bit 0
Bit 0
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11.0 In-System Programming
11.1 INTRODUCTION
This device provides the capability to program the program
memory while installed in an application board. This feature
is called In System Programming (ISP). It provides a means
of ISP by using the MICROWIRE/PLUS, or the user can
provide his own, customized ISP routine. The factory in-
stalled ISP uses the MICROWIRE/PLUS port. The user can
provide his own ISP routine that uses any of the capabilities
of the device, such as USART, parallel port, etc.
11.2 FUNCTIONAL DESCRIPTION
The organization of the ISP feature consists of the user flash
program memory, the factory boot ROM, and some registers
dedicated to performing the ISP function. See Figure 13 for
a simplified block diagram. The factory installed ISP that
uses MICROWIRE/PLUS is located in the Boot ROM. The
size of the Boot ROM is 1K bytes and also contains code to
facilitate in system emulation capability. If a user chooses to
write his own ISP routine, it must be located in the flash
program memory.
the erased state, the FLEX bit = 0 and the device will
power-up executing from Boot ROM. When FLEX = 0, this
assumes that either the MICROWIRE/PLUS ISP routine or
external programming is being used to program the device. If
ADCH2 ADC channel select bit
ADCH1 ADC channel select bit
ADCH0 ADC channel select bit
ADMOD Places the ADC in single-ended or differential
MUX
PSC
ADBSY Signifies that the ADC is currently busy perform-
mode.
Enables the ADC multiplexor output.
Switches the ADC clock between a divide by one
or a divide by sixteen of MCLK.
ing a conversion. When set by the user, starts a
conversion.
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