cop8ccr9 National Semiconductor Corporation, cop8ccr9 Datasheet - Page 69

• Manufacturer Part Number: cop8ccr9
• Description: 8-bit Cmos Flash Microcontroller With 32k Memory, Virtual Eeprom, 10-bit A/d And Brownout
• Manufacturer: National Semiconductor Corporation

20.0 Instruction Set
Indirect from Program Memory. This is a special case of
an indirect instruction that allows access to data tables
stored in program memory. In the “Load Accumulator Indi-
rect” (LAID) instruction, the upper and lower bytes of the
Program Counter (PCU and PCL) are used temporarily as a
pointer to program memory. For purposes of accessing pro-
gram memory, the contents of the Accumulator and PCL are
exchanged. The data pointed to by the Program Counter is
loaded into the Accumulator, and simultaneously, the original
contents of PCL are restored so that the program can re-
sume normal execution.
Example: Load Accumulator Indirect
20.3.2 Tranfer-of-Control Addressing Modes
Program instructions are usually executed in sequential or-
der. However, Jump instructions can be used to change the
normal execution sequence. Several transfer-of-control ad-
dressing modes are available to specify jump addresses.
A change in program flow requires a non-incremental
change in the Program Counter contents. The Program
Counter consists of two bytes, designated the upper byte
(PCU) and lower byte (PCL). The most significant bit of PCU
is not used, leaving 15 bits to address the program memory.
Different addressing modes are used to specify the new
address for the Program Counter. The choice of addressing
mode depends primarily on the distance of the jump. Farther
jumps sometimes require more instruction bytes in order to
completely specify the new Program Counter contents.
The available transfer-of-control addressing modes are:
The transfer-of-control addressing modes are described be-
low. Each description includes an example of a Jump in-
struction using a particular addressing mode, and the effect
on the Program Counter bytes of executing that instruction.
Jump Relative. In this 1-byte instruction, six bits of the
instruction opcode specify the distance of the jump from the
current program memory location. The distance of the jump
can range from −31 to +32. A JP+1 instruction is not allowed.
The programmer should use a NOP instead.
Example: Jump Relative
• Jump Relative
• Jump Absolute
• Jump Absolute Long
• Jump Indirect
Memory Location
Accumulator
LAID
JP 0A
041F Hex
Reg/Data
Memory
PCU
PCU
PCL
Reg
PCL
Contents
Before
02 Hex
05 Hex
Contents
1F Hex
Before
04 Hex
35 Hex
25 Hex
(Continued)
Contents
02 Hex
0F Hex
After
Contents
04 Hex
36 Hex
25 Hex
25 Hex
After
69
Jump Absolute. In this 2-byte instruction, 12 bits of the
instruction opcode specify the new contents of the Program
Counter. The upper three bits of the Program Counter re-
main unchanged, restricting the new Program Counter ad-
dress to the same 4-kbyte address space as the current
instruction. (This restriction is relevant only in devices using
more than one 4-kbyte program memory space.)
Example: Jump Absolute
Jump Absolute Long. In this 3-byte instruction, 15 bits of
the instruction opcode specify the new contents of the Pro-
gram Counter.
Example: Jump Absolute Long
Jump Indirect. In this 1-byte instruction, the lower byte of
the jump address is obtained from a table stored in program
memory, with the Accumulator serving as the low order byte
of a pointer into program memory. For purposes of access-
ing program memory, the contents of the Accumulator are
written to PCL (temporarily). The data pointed to by the
Program Counter (PCH/PCL) is loaded into PCL, while PCH
remains unchanged.
Example: Jump Indirect
The VIS instruction is a special case of the Indirect Transfer
of Control addressing mode, where the double-byte vector
associated with the interrupt is transferred from adjacent
addresses in program memory into the Program Counter in
order to jump to the associated interrupt service routine.
20.4 INSTRUCTION TYPES
The instruction set contains a wide variety of instructions.
The available instructions are listed below, organized into
related groups.
Some instructions test a condition and skip the next instruc-
tion if the condition is not true. Skipped instructions are
executed as no-operation (NOP) instructions.
Accumulator
JMP 0125
JMP 03625
JID
0126 Hex
Memory
Memory
Location
Memory
Reg/
Reg/
PCU
PCU
PCU
Reg
PCL
PCL
PCL
Contents
Contents
0C Hex
Before
77 Hex
Before
42 Hex
36 Hex
Contents
C4 Hex
Before
01 Hex
26 Hex
32 Hex
Contents
Contents
01 Hex
25 Hex
36 Hex
25 Hex
After
Contents
After
01 Hex
32 Hex
26 Hex
32 Hex
After
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