cop8ccr9 National Semiconductor Corporation, cop8ccr9 Datasheet - Page 64

• Manufacturer Part Number: cop8ccr9
• Description: 8-bit Cmos Flash Microcontroller With 32k Memory, Virtual Eeprom, 10-bit A/d And Brownout
• Manufacturer: National Semiconductor Corporation

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18.0 MICROWIRE/PLUS
18.1 MICROWIRE/PLUS OPERATION
Setting the BUSY bit in the PSW register causes the
MICROWIRE/PLUS to start shifting the data. It gets reset
when eight data bits have been shifted. The user may reset
the BUSY bit by software to allow less than 8 bits to shift. If
enabled, an interrupt is generated when eight data bits have
been shifted. The device may enter the MICROWIRE/PLUS
mode either as a Master or as a Slave. Figure 32 shows how
two microcontroller devices and several peripherals may be
interconnected using the MICROWIRE/PLUS arrangements.
The SIO register should only be loaded when the SK clock is
in the idle phase. Loading the SIO register while the SK clock
is in the active phase, will result in undefined data in the SIO
register.
Setting the BUSY flag when the input SK clock is in the
active phase while in the MICROWIRE/PLUS is in the slave
mode may cause the current SK clock for the SIO shift
register to be narrow. For safety, the BUSY flag should only
be set when the input SK clock is in the idle phase.
18.1.1 MICROWIRE/PLUS Master Mode Operation
In the MICROWIRE/PLUS Master mode of operation the
shift clock (SK) is generated internally. The MICROWIRE/
PLUS Master always initiates all data exchanges. The MSEL
bit in the CNTRL register must be set to enable the SO and
Where t
SL1
C
0
0
1
is the instruction cycle clock
TABLE 30. MICROWIRE/PLUS
Master Mode Clock Select
SL0
0
1
x
Warning:
SK Period
FIGURE 32. MICROWIRE/PLUS Application
(Continued)
2 x t
4 x t
8 x t
C
C
C
64
SK functions onto the G Port. The SO and SK pins must also
be selected as outputs by setting appropriate bits in the Port
G configuration register. In the slave mode, the shift clock
stops after 8 clock pulses. Table 31 summarizes the bit
settings required for Master mode of operation.
18.1.2 MICROWIRE/PLUS Slave Mode Operation
In the MICROWIRE/PLUS Slave mode of operation the SK
clock is generated by an external source. Setting the MSEL
bit in the CNTRL register enables the SO and SK functions
onto the G Port. The SK pin must be selected as an input
and the SO pin is selected as an output pin by setting and
resetting the appropriate bits in the Port G configuration
register. Table 31 summarizes the settings required to enter
the Slave mode of operation.
The user must set the BUSY flag immediately upon entering
the Slave mode. This ensures that all data bits sent by the
Master is shifted properly. After eight clock pulses the BUSY
flag is clear, the shift clock is stopped, and the sequence
may be repeated.
This table assumes that the control flag MSEL is set.
Config. Bit
G4 (SO)
TABLE 31. MICROWIRE/PLUS Mode Settings
1
0
1
0
Config. Bit
G5 (SK)
1
1
0
0
STATE
STATE
Fun.
TRI-
TRI-
SO
SO
G4
Fun.
Ext.
Ext.
G5
Int.
SK
Int.
SK
SK
SK
10137435
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Slave
MICROWIRE/PLUS
Slave
Operation