sc68c652b NXP Semiconductors, sc68c652b Datasheet - Page 6

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sc68c652b

Manufacturer Part Number
sc68c652b
Description
Sc68c652b 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. With 32-byte Fifos, Irda Encoder/decoder, And Motorola Up Interface
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Table 2:
9397 750 14657
Product data sheet
Symbol
TXA, TXB
TXRDYA,
TXRDYB
V
XTAL1
XTAL2
CC
Pin description
Pin
7, 8
43, 6
19, 42
13
14
Type
O
O
I
I
O
…continued
Description
Transmit data A, B. These outputs are associated with individual serial transmit
channel data from the SC68C652B. The TX signal will be a logic 1 during reset, idle (no
data), or when the transmitter is disabled. During the local loop-back mode, the TX
output pins are disabled and TX data is internally connected to the UART RX input.
Transmit Ready A, B (active LOW). These outputs provide the TX FIFO/THR status
for individual transmit channels A and B. TXRDYn is primarily intended for monitoring
DMA mode 1 transfers for the transmit data FIFOs. An individual channel’s TXRDYA,
TXRDYB buffer ready status is indicated by logic 0, that is, at least one location is empty
and available in the FIFO or THR. This pin goes to a logic 1 (DMA mode 1) when there
are no more empty locations in the FIFO or THR. This signal can also be used for single
mode transfers (DMA mode 0).
Power supply input.
Crystal or external clock input. Functions as a crystal input or as an external clock
input. A crystal can be connected between this pin and XTAL2 to form an internal
oscillator circuit (see
between the XTAL1 and XTAL2 pins. Alternatively, an external clock can be connected
to this pin to provide custom data rates. See
generator”.
Output of the crystal oscillator or buffered clock. (See also XTAL1.) XTAL2 is used
as a crystal oscillator output or a buffered clock output. Should be left open if an external
clock is connected to XTAL1. For extended frequency operation, this pin should be tied
to V
CC
via a 2 k resistor.
Rev. 01 — 25 April 2005
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
Figure
3). This configuration requires an external 1 M resistor
Section 6.8 “Programmable baud rate
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC68C652B
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