ak5354 AKM Semiconductor, Inc., ak5354 Datasheet - Page 6

• Manufacturer Part Number: ak5354
• Description: Low Power 20bit ?? Adc With Pga
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
(Ta=25°C; VA=2.1 ∼ 3.3V, VD=1.8 ∼ 3.3V; C
Parameter
Control Clock Frequency
Frequency
Audio Interface Timing
Control Interface Timing
Reset / Calibration Timing
Note: 7. fs ≥ 19.6kHz.
Note: 8. These cycles are the numbers of LRCK rising from PDN pin rising.
MS0054-E-02
Master Clock (MCLK) 256fs: Frequency
Channel Clock (LRCK)
PDN Pulse Width
PDN “↑” to SDTO
BCLK Period
BCLK Pulse Width Low
BCLK “↓” to LRCK
LRCK Edge to SDTO (MSB)
BCLK “↓” to SDTO
CCLK Period
CCLK Pulse Width Low
CDATA Setup Time
CDATA Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
In the case of fs <19.6kHz, these three parameters must meet a relationship of
For example, When tCCK=200ns and tCSS=50ns at fs=8kHz, tCSW(min) is 2457ns. When tCSW=150ns and
tCSS=50ns fs=8kHz, tCCK(min) is 530ns.
(tCSW + tCSS + 7 × tCCK) > 1/(32 × fs) in addition to these specifications.
Pulse Width High
Pulse Width High
Pulse Width Low
Pulse Width High
Pulse Width Low
Pulse Width High
384fs:
Frequency
Duty Cycle
(Note 8)
SWITCHING CHARACTERISTICS
L
=20pF)
Symbol
tCLKH
tCLKH
tBLKH
tCCKL
tCCKH
tCLKL
tCLKL
tBLKL
tCSW
tPWV
fCLK
fCLK
tCCK
tCDH
tBLK
tBLR
tDLR
tCDS
tCSH
tDSS
tCSS
tPW
fs
- 6 -
-tBLKH+50
200(Note 7)
150(Note 7)
50(Note 7)
2.048
3.072
312.5
min
130
130
150
28
28
23
23
45
80
80
50
50
50
8
11.2896
16.9344
4128
typ
44.1
tBLKL-50
max
12.8
19.2
50
55
80
80
[AK5354]
MHz
MHz
2004/12
kHz
1/fs
Units
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns