xr16v2752il Exar Corporation, xr16v2752il Datasheet - Page 23

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xr16v2752il

Manufacturer Part Number
xr16v2752il
Description
High Performance Duart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet
REV. 1.0.2
SEE”RECEIVER” ON PAGE 13.
SEE”TRANSMITTER” ON PAGE 12.
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
4.0 INTERNAL REGISTERS DESCRIPTIONS
4.1
4.2
4.3
A
A2-A0
DDRESS
0 1 0
0 0 0
0 0 0
0 0 1
0 0 0
0 0 1
0 1 0
0 0 0
0 0 1
0 1 0
1 0 0
1 0 1
1 1 0
1 1 1
Receive Holding Register (RHR) - Read- Only
Transmit Holding Register (THR) - Write-Only
Interrupt Enable Register (IER) - Read/Write
XOFF1 RD/WR
XOFF2 RD/WR
T
DREV
FCTR RD/WR
XON1 RD/WR
XON2 RD/WR
N
DVID
DLM
TRG
AFR
DLD
EFR
R
DLL
ABLE
FC
AME
EG
8: I
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
W
R
WR
RD
RD
RD
EAD
RITE
NTERNAL
/
Enable
RX/TX
Mode
B
Rsvd
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Auto
CTS
Bit-7
Bit-7
Bit-7
Bit-7
IT
0
0
-7
R
EGISTERS
SCPAD
Enable
Swap
B
Rsvd
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Auto
Bit-6
Bit-6
Bit-6
Bit-6
RTS
IT
0
0
-6
Baud Rate Generator Divisor
D
ESCRIPTION
Enhanced Registers
Special
Select
Table
B
Rsvd
Char
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-1
Bit-5
Bit-5
Bit-5
Bit-5
Trig
IT
0
0
-5
23
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
MCR[7:5],
IER [7:4],
ISR [5:4],
FCR[5:4],
Enable
.
B
Table
Rsvd
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-0
Bit-4
Bit-4
Bit-4
Bit-4
DLD
Trig
S
IT
0
0
HADED BITS ARE ENABLED WHEN
-4
Direction
Control
RS485
B
Rsvd
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Auto
Soft-
ware
Flow
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Cntl
IT
1
-3
RXRDY#
RX IR
B
Select
Input
ware
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Soft-
Flow
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Cntl
Inv.
IT
0
-2
Baudout#
B
Select
ware
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Auto
Bit-1
Soft-
Flow
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
RTS
Hyst
Cntl
IT
1
-1
EFR B
rent Write
Concur-
B
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Auto
Bit-0
Soft-
ware
Flow
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
RTS
Hyst
Cntl
IT
IT
0
XR16V2752
-0
-4=1
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR=0
EFR[4] = 0
EFR[4] = 1
DLM=0x00
DLL=0x00
C
LCR[7]=1
LCR[7]=1
LCR[7]=1
LCR[7]=1
OMMENT
X
BF

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