xr16l2752ij Exar Corporation, xr16l2752ij Datasheet - Page 9

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xr16l2752ij

Manufacturer Part Number
xr16l2752ij
Description
2.25v To 5.5v Duart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet

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xr
REV. 1.2.1
The INTA and INTB interrupt output changes according to the operating mode and enhanced features setup.
Table 3 and 4
through 23.
The 2752 includes an on-chip oscillator (XTAL1 and XTAL2) to produce a clock for both UART sections in the
device. The CPU data bus does not require this clock for bus operation. The crystal oscillator provides a
system clock to the Baud Rate Generators (BRG) section found in each of the UART. XTAL1 is the input to the
oscillator or external clock buffer input with XTAL2 pin being the output. For programming details, see
“Programmable Baud Rate Generator.”
F
2.9
2.10
IGURE
INTA/B Pin
INTA/B Pin
INTA/B Pin
4. T
INTA and INTB Outputs
Crystal Oscillator or External Clock Input
YPICAL OSCILLATOR CONNECTIONS
summarize the operating behavior for the transmitter and receiver. Also see
Auto RS485
LOW = no data
HIGH = 1 byte
Mode
YES
NO
(FIFO D
T
FCR B
ABLE
T
ABLE
LOW = a byte in THR
HIGH = THR empty
LOW = a byte in THR
HIGH = transmitter empty
IT
ISABLED
3: INTA
-0 = 0
4: INTA
(FIFO D
FCR B
)
AND
AND
22-47 pF
IT
ISABLED
XTAL1
INTB P
C1
-0 = 0
LOW = FIFO below trigger level
HIGH = FIFO above trigger level
INTB P
500 KΩ − 1 MΩ
)
INS
R2
IN
22-47 pF
9
XTAL2
O
C2
O
Y1
PERATION FOR
LOW = FIFO above trigger level
HIGH = FIFO below trigger level or FIFO empty
LOW = FIFO above trigger level
HIGH = FIFO below trigger level or transmitter empty
PERATION
1.8432 MHz
(Optional)
0-120 Ω
24 MHz
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
R1
to
F
FCR B
OR
(FIFO E
FCR B
T
RANSMITTER
R
ECEIVER
IT
-0 = 1 (FIFO E
IT
NABLED
-0 = 1
)
NABLED
)
XR16L2752
Figures 18

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