xr16l784iv Exar Corporation, xr16l784iv Datasheet - Page 36
xr16l784iv
Manufacturer Part Number
xr16l784iv
Description
High Performance 2.97v To 5.5v Quad Uart
Manufacturer
Exar Corporation
Datasheet
1.XR16L784IV.pdf
(52 pages)
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XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
This register controls the UART enhanced functions that are not available on ST16C554 or ST16C654.
FCTR [3:0] - Auto RTS/DTR Flow Control Hysteresis Select
These bits select the auto RTS/DTR flow control hysteresis and only valid when TX and RX Trigger Table-D is
selected (FCTR bit-6 and 7 are set to logic 1). The RTS/DTR hysteresis is referenced to the RX FIFO trigger
level. After reset, these bits are set to logic 0 selecting the next FIFO trigger level for hardware flow control.
Table 17
4.11
4.12
T
SCRATCH PAD REGISTER (SPR) - Read/Write
FEATURE CONTROL REGISTER (FCTR) - Read/Write
ABLE
below shows the 16 selectable hysteresis levels.
16: A
UTO
MSR[7]
RS485 H
0
0
0
0
0
9
0
0
1
1
1
1
1
1
1
1
MSR[6]
ALF
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
-
DUPLEX
MSR[5]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D
IRECTION
MSR[4]
36
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
ONTROL
D
ELAY IN
D
ELAY FROM
D
ATA
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
B
IT
T
(
S
RANSMIT
) T
IME
-
TO
xr
-R
ECEIVE
REV. 1.2.2