wm8918 Wolfson Microelectronics plc, wm8918 Datasheet - Page 118

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wm8918

Manufacturer Part Number
wm8918
Description
Ultra Low Power Dac For Portable Audio Applications
Manufacturer
Wolfson Microelectronics plc
Datasheet

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WM8918
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Table 79 Write Sequencer Control - Programming a Sequence
Note that a ‘Dummy’ write can be inserted into a control sequence by commanding the sequencer to
write a value of 0 to bit 0 of Register R255 (FFh). This is effectively a write to a non-existent register
location. This can be used in order to create placeholders ready for easy adaptation of the sequence.
For example, a sequence could be defined to power-up a mono signal path from DACL to
headphone, with a ‘dummy’ write included to leave space for easy modification to a stereo signal
path configuration. Dummy writes can also be used in order to implement additional time delays
between register writes. Dummy writes are included in the default start-up sequence – see Table 81.
In summary, the Control Register to be written is set by the WSEQ_ADDR field. The data bits that
are written are determined by a combination of WSEQ_DATA_START, WSEQ_DATA_WIDTH and
WSEQ_DATA. This is illustrated below for an example case of writing to the VMID_RES field within
Register R5 (05h).
In this example, the Start Position is bit 01 (WSEQ_DATA_START = 0001b) and the Data width is 2
bits (WSEQ_DATA_WIDTH = 0001b). With these settings, the Control Write Sequencer would
updated the Control Register R5 [2:1] with the contents of WSEQ_DATA [1:0].
Figure 68 Control Write Sequencer Example
R110 (6Eh)
Write
Sequencer
2
REGISTER
ADDRESS
11:8
BIT
7:0
14
WSEQ_DELAY
WSEQ_DATA
WSEQ_EOS
LABEL
[3:0]
[7:0]
0000_0000
DEFAULT
0000
0
End of Sequence flag. This bit
indicates whether the Control Write
Sequencer should stop after executing
this step.
0 = Not end of sequence
1 = End of sequence (Stop the
sequencer after this step).
Time delay after executing this step.
Total delay time per step (including
execution)=
62.5μs × (2^WSEQ_DELAY + 8)
Data to be written in this sequence
step. When the data width is less than
8 bits, then one or more of the MSBs
of WSEQ_DATA are ignored. It is
recommended that unused bits be set
to 0.
PD, Rev 4.0, September 2010
DESCRIPTION
Production Data
118

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