wm8742 Wolfson Microelectronics plc, wm8742 Datasheet - Page 31

• Manufacturer Part Number: wm8742
• Description: 24-bit 192khz Dac With Advanced Digital Filtering
• Manufacturer: Wolfson Microelectronics plc

Production Data
Table 24 Attenuation Control
Note:
1.
w
REGISTER
Attenuation
Attenuation
Attenuation
DACRMSB
Attenuation
ADDRESS
DACLMSB
DACRLSB
DACLLSB
The UPDATE bit is not latched. If UPDATE=0, the attenuation value will be written to the pre-latch but not applied to
the relevant DAC. If UPDATE=1, all pre-latched values and the current value being written will be applied on the next
input sample.
00h
01h
02h
03h
R0
R1
R2
R3
BITS
[4:0]
[4:0]
[4:0]
[4:0]
5
5
5
5
UPDATE
UPDATE
UPDATE
UPDATE
RAT[4:0]
RAT[9:5]
LAT[4:0]
LAT[9:5]
LABEL
DAC OUTPUT ATTENUATION
Registers LAT[9:0] and RAT[9:0] control the left and right channel attenuation. Table 25 shows how
the attenuation levels are configured by the 10-bit words.
Table 25 Attenuation Control Levels
ATTENUATION CONTROL MODE
Setting the ATC register bit causes the left channel attenuation settings to be applied to both left and
right channel DACs from the next audio input sample. No update to the attenuation registers is
required for ATC to take effect. Right channels register settings are preserved regardless of the
status of ATC.
Table 26 Attenuator Control Mode
REGISTER ADDRESS
Volume Control
L/RAT[9:0]
3FE(hex)
000(hex)
001(hex)
3FF(hex)
04h
:
:
:
R4
DEFAULT
00 (0dB)
00 (0dB)
00 (0dB)
00 (0dB)
0
0
0
0
BIT
2
LSBs of attenuation data for left channel in 0.125dB steps. See
Table 25 for details.
Attenuation data load control for left channel.
0 = Store LAT[4:0] value but don’t update
1 = Store LAT[4:0] and update attenuation on registers 0-3
MSBs of attenuation data for left channel in 4dB steps. See Table
25 for details.
Attenuation data load control for left channel.
0 = Store LAT[9:5] value but don’t update
1 = Store LAT[9:5] and update attenuation on registers 0-3
LSBs of attenuation data for right channel in 0.125dB steps. See
Table 25 for details.
Attenuation data load control for right channel.
0 = Store RAT[4:0] value but don’t update
1 = Store RAT[4:0] and update attenuation on registers 0-3
MSBs of attenuation data for right channel in 4dB step. See Table
25 for details.
Attenuation data load control for right channel.
0 = Store RAT[9:5] value but don’t update
1 = Store RAT[9:5] and update attenuation on registers 0-3
ATTENUATION LEVEL
LABEL
-∞dB (mute)
-127.75dB
ATC
-0.125dB
0dB
:
:
:
DEFAULT
0
DESCRIPTION
Attenuator Control Mode:
0 = Right channels use Right
attenuation
1 = Right Channels use Left
Attenuation
DESCRIPTION
PD, Rev 4.2, August 2009
WM8742
31