wm8569seds-v Wolfson Microelectronics plc, wm8569seds-v Datasheet - Page 29
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wm8569seds-v
Manufacturer Part Number
wm8569seds-v
Description
24-bit, 192khz Stereo Codec With Volume Control
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8569SEDS-V.pdf
(36 pages)
Production Data
w
(all channels)
Attenuation
Attenuation
Attenuation
REGISTER
ADDRESS
0000000
0000001
0001000
Master
DACR
Digital
Digital
Digital
DACL
BIT
7:0
7:0
7:0
8
8
8
MASTDA
UPDATE
RDA[6:0]
UPDATE
UPDATE
DAC DIGITAL VOLUME CONTROL
The DAC volume may also be adjusted in the digital domain using independent digital attenuation
control registers
LDA[7:0]
Table 10 Digital Volume Control Attenuation Levels
SOFTWARE REGISTER RESET
Writing to register 11111 will cause a register reset, resetting all register bits to their default values.
The device will be held in this reset state until a subsequent register write to any address is
completed.
LABEL
[7:0]
L/RDAX[7:0]
FE(hex)
00(hex)
01(hex)
FF(hex)
Not latched
Not latched
Not latched
:
:
:
DEFAULT
11111111
11111111
11111111
(0dB)
(0dB)
(0dB)
Digital Attenuation data for Left channel DACL in 0.5dB steps. See
Table 10
Controls simultaneous update of all Attenuation Latches
Digital Attenuation data for Right channel DACR in 0.5dB steps. See
Table 10
Controls simultaneous update of all Attenuation Latches
Digital Attenuation data for all DAC channels in 0.5dB steps. See
Controls simultaneous update of all Attenuation Latches
Table 10
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
0: Store LDA in intermediate latch (no change to output)
1: Store LDA and update attenuation on all channels
ATTENUATION LEVEL
0: Store RDA in intermediate latch (no change to output)
1: Store RDA and update attenuation on all channels.
- dB (mute)
-127dB
-0.5dB
0dB
:
:
:
DESCRIPTION
PD Rev 4.0 June 2006
WM8569
29