wm9711lgefl-v Wolfson Microelectronics plc, wm9711lgefl-v Datasheet - Page 42

• Manufacturer Part Number: wm9711lgefl-v
• Description: Low Power Audio Codec For Portable Applications
• Manufacturer: Wolfson Microelectronics plc

WM9711L
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The properties of the GPIOs are controlled through registers 4Ch to 52h, as shown below.
Table 28 GPIO Control
The following procedure is recommended for handling interrupts:
When the controller receives an interrupt, check register 54h. For each GPIO bit in descending order
of priority, check if the bit is ‘1’. If yes, execute corresponding interrupt routine, then write ‘0’ to
corresponding bit in 54h. If no, continue to next lower priority GPIO. After all GPIOs have been
checked, check if interrupt still present or no. If yes, repeat procedure. If no, then jump back to
process that ran before the interrupt.
If the system CPU cannot execute such an interrupt routine, it may be preferable to switch internal
signals (such as PENDOWN) directly onto the GPIO pins. However, in this case the interrupt signals
cannot be made sticky, and more GPIO pins are tied up both on the WM9711L and on the CPU.
Table 29 Using GPIO Pins for Non-GPIO Functions
4Ch
4Eh
50h
52h
54h
56h
GPIO pins
function
select
REGISTER
REGISTER
ADDRESS
ADDRESS
2
5
n
n
n
n
n
BIT
BIT
GCn
GPn
GSn
GWn
GIn
GE2
GE5
LABEL
LABEL
1
1
0
0
N/A
1
1
DEFAULT
DEFAULT
GPIO Pin Configuration
0: Output
1: Input
GC11-15 are always ‘1’
Unused bits GC6-GC10 are always ‘0’
GPIO Pin Polarity / Type
0: Active Low
1: Active High
[GIn = pin level XNOR GPn)
Unused bits GP6-GP10, GP12 and GP13 are
always ‘1’
GPIO Pin Sticky
1: Sticky
0: Not Sticky
Unused bits GS6-GS10, GS12 and GS13 are
always ‘0’
GPIO Pin Wake-up
1: Wake Up (generate interrupts from this pin)
0: No wake-up (no interrupts generated)
Unused bits GW6-GW10, GW12 and GW13 are
always ‘0’
GPIO Pin Status
Read: Returns status of each GPIO pin
Write: Sets output pin high or low.
(Writing ‘0’ clears sticky bit)
Unused bits GI6-GI10, GI12 and GI13 are
always ‘0’
GPIO2 / IRQ output select
0: Pin 45 disconnected from GPIO logic
1: Pin 45 connected to GPIO logic (IRQ disabled)
GPIO5 / SPDIF output select
0: Pin 48 = SPDIF (disconnected from GPIO logic)
1: Pin 48 connected to GPIO logic (SPDIF
disabled)
set 4Ch, bit 2 to ‘0’ to output IRQ signal
set 4Ch, bit 5 to ‘0’ to output SPDIF signal
DESCRIPTION
DESCRIPTION
PD Rev 4.3 August 2006
Production Data
42