wm9711lgefl-v Wolfson Microelectronics plc, wm9711lgefl-v Datasheet - Page 44

• Manufacturer Part Number: wm9711lgefl-v
• Description: Low Power Audio Codec For Portable Applications
• Manufacturer: Wolfson Microelectronics plc

WM9711L
w
Table 32 Extended Power Down Register (Additional to AC’97 Rev 2.2)
Note:
*When disabling a PGA, always ensure that it is muted first.
ADDITIONAL POWER MANAGEMENT:
•
SLEEP MODE
Whenever the PR4 bit (reg. 26h) is set, the AC-Link interface is disabled, and the WM9711L is in
sleep mode. There is in fact a very large number of different sleep modes, depending on the other
control bits. For example, the low-power standby mode described below is a sleep mode. It is
desirable to use sleep modes whenever possible, as this will save power. The following functions do
not require a clock and can therefore operate in sleep mode:
•
•
•
The WM9711L can awake from sleep mode as a result of
•
•
•
24h
Additional
power down
control
Note: When analogue inputs or outputs are disabled, they are internally connected to VREF
through a large resistor (VREF=AVDD/2 except in OFF mode, when VREF itself is disabled). This
maintains the potential at that node and helps to eliminate pops when the pins are re-enabled.
REGISTER
ADDRESS
AUXDAC: see “Auxiliary DAC” section. AUXDAC is OFF by default.
Analogue-to-analogue audio (DACs and ADCs unused), e.g. phone call mode
GPIO and interrupts
Battery alarm / analogue comparators
A warm reset on the AC-Link (according to the AC’97 specification)
A signal on a GPIO pin (if the pin is configured as an input, with wake-up enabled – see
“GPIO and Interrupt Control” section)
A virtual GPIO event such as battery alarm, thermal sensor, etc. (see “GPIO and
Interrupt Control” section)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BIT
PD15
PD14
PD13
PD12
PD11
PD10
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
LABEL
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
DEFAULT
Disables Crystal Oscillator
Disables left audio DAC
Disables right audio DAC
Disables left audio ADC
Disables right audio ADC
Disables MICBIAS
Disables left headphone mixer
Disables right headphone mixer
Disables speaker mixer
Disables MONO_OUT buffer (pin 33) and phone
mixer
Disables OUT3 buffer (pin 37)
Disables headphone buffers (HPOUTL/R)
Disables speaker outputs (LOUT2, ROUT2)
Disables Line Input PGA (left and right) *
Disables Phone Input PGA *
Disables Mic Input PGA (left and right) *
DESCRIPTION
PD Rev 4.3 August 2006
Production Data
44