zl2005 Intersil Corporation, zl2005 Datasheet - Page 14

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zl2005

Manufacturer Part Number
zl2005
Description
Digital-dc? Integrated Power Management And Conversion Ic
Manufacturer
Intersil Corporation
Datasheet

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These pins are sampled when power is applied or by
issuing a PMBus Restore command (See Application
Note AN13).
Table 5. Multi-mode Pin Configuration
Resistor to GND
Figure 8. Pin-strap and Resistor Setting
(Logic high)
Pin Tied To
(Logic low)
OPEN
HIGH
(N/C)
GND
Examples
14
Set by resistor value
No connection
< 0.8 VDC
> 2.0 VDC
Value
ZL2005
Pin-strap Settings: This is the simplest implementa-
tion method, as no external components are required.
Using this method, each pin can take on one of three
possible states: GND, OPEN, or HIGH. These pins
can be connected to the VR or V25 pins for logic
HIGH settings, as either pin provides a regulated volt-
age greater than 2V. Using a single pin, the user can
select one of three settings, and using two pins, the
user can select one of nine settings.
Resistor Settings: This method allows a greater range
of adjustability when connecting a finite valued resis-
tor (in a specified range) between the multi-mode pin
and SGND. Standard 1% resistor values are used, and
only every fourth E96 resistor value is used so that the
device can reliably recognize the value of resistance
connected to the pin while eliminating the errors asso-
ciated with the resistor accuracy. A total of 25 unique
selections are available using a single resistor.
I
can be configured via the I
standard PMBus commands. Additionally, any value
that has been configured using the pin-strap or resistor
setting methods can also be re-configured and/or veri-
fied via the I
for details.
2
C/SMBus Settings: Almost any ZL2005 function
2
C/SMBus. See Application Note AN13
2
C/SMBus interface using
February 18, 2009
FN6848.0

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