zl2005 Intersil Corporation, zl2005 Datasheet - Page 33

• Manufacturer Part Number: zl2005
• Description: Digital-dc? Integrated Power Management And Conversion Ic
• Manufacturer: Intersil Corporation

6.7 Voltage Margining
The ZL2005 offers a simple means to vary its output
higher or lower than its nominal voltage setting in
order to determine whether the load device is capable
of operating over its specified supply voltage range.
The MGN pin is a TTL-compatible input that is con-
tinuously monitored and can be driven directly by a
processor I/O pin or other logic-level output.
The ZL2005’s output will be forced higher than its
nominal setpoint when the MGN pin is driven HIGH,
and the output will be forced lower than its nominal
setpoint when the MGN pin is driven LOW. When the
MGN pin is left floating (high impedance), the
ZL2005’s output voltage will be set to its nominal
voltage setpoint determined by the V0 and V1 pins
and/or the I
inal output voltage. Default margin limits of V
±5% are pre-loaded in the factory, but the margin lim-
its can be modified through the I
to as high as V
V
mined by the V0 and V1 pins.
The margin limits and the MGN command can both be
set individually through the I
Additionally, the transition rate between the nominal
output voltage and either margin limit can be config-
ured through the I
Application Note AN13 for detailed instructions on
modifying the margining configurations.
6.8 I
The ZL2005 provides an I
that enables the user to configure all aspects of the
device operation as well as monitor the input and out-
put parameters. The ZL2005 can be used with any
standard 2-wire I
device is compatible with SMBus version 2.0 and
includes an SALRT line to help mitigate bandwidth
limitations related to continuous fault monitoring. The
ZL2005 accepts most standard PMBus commands.
NOM
2
is the nominal output voltage setpoint deter-
C/SMBus Communications
2
C/SMBus settings that configure the nom-
NOM
2
2
C/SMBus interface. Please refer to
C host device.
+ 10% or as low as 0V, where
33
2
C/SMBus digital interface
2
C/SMBus interface.
2
C/SMBus interface
In addition, the
NOM
ZL2005
6.9 I
When communicating with multiple ZL2005s using
the I
its own unique address so the host can distinguish
between the devices. The device address can be set
according to the pin-strap options listed in Table 25 to
provide up to eight unique device addresses. Address
values are right-justified.
Table 25. Serial Bus Device Address Selection
If additional device addresses are required, a resistor
can be connected to the SA0 pin according to Table 26
to provide up to 25 unique device addresses. In this
case the SA1 pin should be tied to SGND.
Table 26. SMBus Address Values
If more than 25 unique device addresses are required
or if other SMBus address values are desired, both the
SA0 and SA1 pins can be configured with a resistor to
SGND according to the equation (30) and Table 27.
Address
SA0
SMBus
0x0A
SMBus address = 25 x (SA1 index) + (SA0 index)
0x0B
0x0C
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
2
C/SMBus serial interface, each device must have
2
C/SMBus Device Address Selection
OPEN
HIGH
LOW
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
31.6 kΩ
10 kΩ
11 kΩ
R
SA0
LOW
0x20
0x21
0x22
Address
SMBus
OPEN
0x0D
0x0E
0x0F
0x23
0x24
0x25
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
SA1
February 18, 2009
Reserved
34.8 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
90.9 kΩ
38.3kΩ
100 kΩ
HIGH
0x26
0x27
75 kΩ
R
SA0
FN6848.0
(30)