74LVC2G86DC,125 NXP Semiconductors, 74LVC2G86DC,125 Datasheet - Page 8

• Manufacturer Part Number: 74LVC2G86DC,125
• Description: IC DUAL 2-IN EXCL-OR GATE 8VSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC2G86DC,125

• Number Of Circuits: 2
• Package / Case: US8, 8-VSSOP
• Logic Type: XOR (Exclusive OR)
• Number Of Inputs: 2
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 1.65 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: OR
• Logic Family: 74LVC
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 4.5 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3016-2; 935278826125

NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
74LVC2G86
Product data sheet
Symbol Parameter
t
C
pd
Fig 8.
PD
Typical values are measured at T
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
propagation delay nA, nB to nY; see
power dissipation
capacitance
Measurement points are given in
V
Propagation delay input (nA, nB) to output (nY)
PD
OL
Dynamic characteristics
CC
× V
2
and V
× f
CC
o
2
) = sum of outputs.
OH
× f
PLH
i
are typical output voltage levels that occur with the output load.
× N + Σ(C
and t
PHL
Conditions
per gate; V
V
L
CC
V
V
V
V
V
output enabled
× V
amb
CC
CC
CC
CC
CC
= 3.3 V
CC
nA, nB input
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
= 25 °C and V
nY output
2
× f
Table
I
o
All information provided in this document is subject to legal disclaimers.
= GND to V
) where:
9.
GND
V
V
OH
OL
V
Figure 8
I
Rev. 8 — 19 October 2010
CC
= 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
CC
;
D
in μW).
V
M
V
M
[2]
[3]
t
PHL
Figure
Min
1.4
0.8
0.8
0.8
0.6
-
−40 °C to +85 °C
9.
Typ
15.8
3.8
2.5
3.0
2.3
1.9
t
[1]
PLH
mna224
Dual 2-input EXCLUSIVE-OR gate
Max
9.9
5.7
5.7
4.7
3.6
-
−40 °C to +125 °C
74LVC2G86
Min
1.4
0.8
0.8
0.8
0.6
-
© NXP B.V. 2010. All rights reserved.
Max
12.4
7.2
7.2
5.9
4.5
-
Unit
ns
ns
ns
ns
ns
pF
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