hn58c1001t-15e Renesas Electronics Corporation., hn58c1001t-15e Datasheet - Page 18

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hn58c1001t-15e

Manufacturer Part Number
hn58c1001t-15e
Description
Memory>eeprom>parallel Eeprom
Manufacturer
Renesas Electronics Corporation.
Datasheet
HN58C1001 Series
2. Data Protection at V
Note: The EEPROM should be kept in unprogrammable state during V
Rev.8.00, Nov. 27.2003, page 18 of 21
When V
as a trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional
programming, the EEPROM must be kept in an unprogrammable state while the CPU is in an unstable
state.
2.1 Protection by RES
The unprogrammable state can be realized by that the CPU’s reset signal inputs directly to the
EEPROM’s RES pin. RES should be kept V
The EEPROM brakes off programming operation when RES becomes low, programming operation
doesn’t finish correctly in case that RES falls low during programming operation. RES should be kept
high for 10 ms after the last data input.
signal.
CC
is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act
9-
or
4-5
V
+-
CC
CC
CPU
RESET
V
On/Off
CC
*
Unprogrammable
1 µs min
Program inhibit
100 µs min
SS
level during V
10 ms min
*
CC
Unprogrammable
on/off.
CC
Program inhibit
on/off by using CPU RESET

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