adf7023-j Analog Devices, Inc., adf7023-j Datasheet - Page 52

• Manufacturer Part Number: adf7023-j
• Description: High Performance, Low Power, Ism Band Fsk/gfsk/msk/gmsk Transceiver Ic
• Manufacturer: Analog Devices, Inc.

ADF7023-J
Random Address Write
MCR, BBRAM, and packet RAM memory locations can be
written to in a nonsequential manner using the SPI_MEMR_WR
command. The SPI_MEMR_WR command code is 00001xxxb,
where xxxb represent Bits[10:8] of the 11-bit address. The lower
eight bits of the address should follow this command and then
the data byte to be written to the address. The lower eight bits of
the next address are entered, followed by the data for that address
until all required addresses within that block are written, as
shown in Figure 66.
Program RAM Write
The program RAM can be written to only by using the memory
block write, as illustrated in Figure 65. SPI_MEM_WR should
be set to 0x1E. See the Downloadable Firmware Modules section
for details on loading a firmware module to program RAM.
Block Read
MCR, BBRAM, and packet RAM memory locations can be read
from in block format using the SPI_MEM_RD command. The
SPI_MEM_RD command code is 00111xxxb, where xxxb represent
Bits[10:8] of the first 11-bit address. This command is followed
by the remaining eight bits of the address to be read and then
two SPI_NOP commands (dummy byte). The first byte available
after writing the address should be ignored, with the second
byte constituting valid data. If more than one data byte is to be
read, the write address is automatically incremented for subsequent
SPI_NOP commands sent. See Figure 67 for more details.
MOSI
MISO
MOSI
MISO
CS
CS
SPI_MEMR_WR
SPI_MEM_WR
IGNORE
IGNORE
Figure 66. Memory (MCR, BBRAM, or Packet RAM) Random Address Write
ADDRESS 1
ADDRESS
STATUS
STATUS
Figure 65. Memory (MCR, BBRAM, or Packet RAM) Block Write
[ADDRESS 1]
[ADDRESS]
DATA FOR
DATA FOR
STATUS
STATUS
Rev. 0 | Page 52 of 100
[ADDRESS + 1]
ADDRESS 2
DATA FOR
STATUS
STATUS
Random Address Read
MCR, BBRAM, and packet RAM memory locations can be
read from memory in a nonsequential manner using the
SPI_MEMR_RD command. The SPI_MEMR_RD command
code is 00101xxxb, where xxxb represent Bits[10:8] of the 11-bit
address. This command is followed by the remaining eight bits
of the address to be written. Each subsequent address byte is
then written. The last address byte to be written should be
followed by two SPI_NOP commands, as shown in Figure 68.
The data bytes from memory, starting at the first address
location, are available after the second status byte.
Example
Read the value stored in the ADC_CONFIG_HIGH register.
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Thus, 0x3B5AFFFF is written to the part.
The value shifted out on the MISO line while the fourth byte is
sent is the value stored in the ADC_CONFIG_HIGH register.
The first five bits of the SPI_MEM_RD command are
00111.
The 11-bit address of ADC_CONFIG_HIGH is
01101011010.
The first byte sent is 00111011 or 0x3B.
The second byte sent is 01011010 or 0x5A.
The third byte sent is 0xFF (SPI_NOP).
The fourth byte sent is 0xFF.
[ADDRESS + 2]
[ADDRESS 2]
DATA FOR
DATA FOR
STATUS
STATUS
[ADDRESS + N]
[ADDRESS N]
DATA FOR
DATA FOR
STATUS
STATUS