adf7023-j Analog Devices, Inc., adf7023-j Datasheet - Page 73

• Manufacturer Part Number: adf7023-j
• Description: High Performance, Low Power, Ism Band Fsk/gfsk/msk/gmsk Transceiver Ic
• Manufacturer: Analog Devices, Inc.

PERIPHERAL FEATURES
ANALOG-TO-DIGITAL CONVERTER
The ADF7023-J supports an integrated SAR ADC for digitization
of analog signals that include the analog temperature sensor, the
analog RSSI level, and an external analog input signal (Pin 30).
The conversion time is typically 1 μs. The result of the conversion
can be read from the ADC_READBACK_HIGH register
(Address 0x327), and the ADC_READBACK_LOW register
(Address 0x328). The ADC readback is an 8-bit value.
The signal source for the ADC input is selected via the
ADC_CONFIG_LOW register (Address 0x359). In the
PHY_RX state, the source is automatically set to the analog
RSSI. The ADC is automatically enabled in PHY_RX. In other
radio states, the host processor must enable the ADC by setting
POWERDOWN_RX (Address 0x324) = 0x10.
To perform an ADC readback, the following procedure should
be completed:
1.
2.
3.
TEMPERATURE SENSOR
The integrated temperature sensor has an operating range between
−40°C and +85°C. To enable readback of the temperature
sensor in PHY_OFF, PHY_ON, or PHY_TX, the following
registers must be set:
1.
2.
3.
The temperature is determined from the ADC readback value
using the following formula:
The correction value can be determined by performing a
readback at a single known temperature.
TEST DAC
The test DAC allows the output of the post-demodulator filter
to be viewed externally. It takes the 16-bit filter output and
Read ADC_READBACK_HIGH. This initializes an ADC
readback.
Read ADC_READBACK_LOW. This returns
ADC_READBACK[1:0] of the ADC sample.
Read ADC_READBACK_HIGH. This returns
ADC_READBACK[7:2] of the ADC sample.
Set POWERDOWN_RX (Address 0x324) = 0x10 = 0x10.
This enables the ADC.
Set POWERDOWN_AUX (Address 0x325) = 0x02. This
enables the temperature sensor.
Set ADC_CONFIG_LOW (Address 0x359) = 0x08. This
sets the ADC input to the temperature sensor.
Temperature (°C) = (ADC_READBACK[7:0] –
42.197)/1.023 + Correction Value
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converts it to a high frequency, single-bit output using a second-
order Σ-Δ converter. The output can be viewed on the GP0 pin.
This signal, when filtered appropriately, can be used to
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•
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To enable the test DAC, the GPIO_CONFIGURE setting
(Address 0x3FA) should be set to 0xC9. The TEST_DAC_GAIN
setting (Address 0x3FD) should be set to 0x00. The test DAC
signal at the GP0 pin can be filtered with a 3-stage, low-pass RC
filter to reconstruct the demodulated signal. For more information,
see the
TRANSMIT TEST MODES
There are two transmit test modes that are enabled by setting
the VAR_TX_MODE parameter (Address 0x00D in packet
RAM memory), as described in Table 42. VAR_TX_MODE
should be set before entering the PHY_TX state.
Table 42. Transmit Test Modes
VAR_TX_MODE
0
1
2
3
4 to 255
SILICON REVISION READBACK
The product code and silicon revision code can be read from
the packet RAM memory as described in Table 43. The values
of the product code and silicon revision code are valid only on
power-up or wake-up from the PHY_SLEEP state because the
communications processor overwrites these values on transitioning
from the PHY_ON state.
Table 43. Product Code and Silicon Revision Code
Packet RAM
Location
0x001
0x002
0x003
0x004
Monitor the signal at the post-demodulator filter output
Measure the demodulator output SNR
Construct an eye diagram of the received bit stream to
measure the received signal quality
Implement analog FM demodulation
AN-852
Application Note.
Description
Product code, most significant byte = 0x70
Product code, least significant byte = 0x23
Silicon revision code, most significant byte
Silicon revision code least significant byte
Mode
Default; no transmit test mode
Reserved
Transmit the preamble continuously
Transmit the carrier continuously
Reserved
ADF7023-J