ak4647 AKM Semiconductor, Inc., ak4647 Datasheet - Page 53
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ak4647
Manufacturer Part Number
ak4647
Description
Stereo Codec With Mic/hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4647.pdf
(72 pages)
- Current page: 53 of 72
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ASAHI KASEI
MS0566-E-00
Addr
Addr
03H
04H
Addr
05H
BEEPL: Switch Control from MIN pin to Stereo Line Output
MGAIN1: MIC-Amp Gain Control (See Table 18)
LOPS: Stereo Line Output Power-Save Mode
LOVL: Stereo Line Output Gain Select (Table 38)
DIF1-0: Audio Interface Format (See Table 13)
BCKO: BICK Output Frequency Select at Master Mode (See Table 10)
PLL3-0: PLL Reference Clock Select (See Table 4)
FS3-0: Sampling Frequency Select (See Table 5 and Table 6.) and MCKI Frequency Select (See Table 11.)
PS1-0: MCKO Output Frequency Select (Table 9)
0: OFF (Default)
1: ON
0: Normal Operation (Default)
1: Power-Save Mode
0: 0dB (Default)
1: +2dB
Default: “10” (Left jutified)
Default: “0000”(LRCK pin)
Default: “00”(256fs)
Register Name
Signal Select 2
Register Name
Mode Control 1
Register Name
Mode Control 2
When PMLO bit is “1”, BEEPL bit is enabled. When PMLO bit is “0”, the LOUT/ROUT pins go to AVSS.
FS3-0 bits select sampling frequency at PLL mode and MCKI frequency at EXT mode.
Default
Default
Default
LOVL
PLL3
PS1
D7
D7
D7
0
0
0
LOPS
PLL2
D6
PS0
D6
0
D6
0
0
- 53 -
MGAIN1
PLL1
D5
FS3
0
D5
D5
0
0
PLL0
D4
0
0
D4
D4
0
0
0
BCKO
D3
0
0
D3
D3
0
0
0
BEEPL
D2
FS2
D2
0
D2
0
0
0
DIF1
FS1
D1
D1
D1
0
0
0
1
[AK4647]
2006/11
DIF0
FS0
D0
D0
D0
0
0
0
0
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