ak4626a AKM Semiconductor, Inc., ak4626a Datasheet - Page 18

• Manufacturer Part Number: ak4626a
• Description: High Performance Multi-channel Audio Codec
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
When TDM= “L”, four modes can be selected by the DIF1-0 as shown in Table 8. In all modes the serial data is
MSB-first, 2’s compliment format. The SDTO is clocked out on the falling edge of BICK and the SDTI/DAUX are
latched on the rising edge of BICK.
Figures 1∼4 shows the timing at SDOS = “L”. In this case, the SDTO outputs the ADC output data. When SDOS = “H”,
the data input to DAUX is converted to SDTO’s format and output from SDTO. Mode 2, 3, 6, 7, 10, 11 in SDTI input
formats can be used for 16-20bit data by zeroing the unused LSBs.
The audio serial interface format becomes the TDM mode if TDM0 pin is set to “H”. In the TDM256 mode, the serial data
of all DAC (six channels) is input to the SDTI1 pin. The input data to SDTI2-3 pins are ignored. BICK should be fixed to
256fs. “H” time and “L” time of LRCK should be 1/256fs at least. Four modes can be selected by the DIF1-0 as shown in
Table 9. In all modes the serial data is MSB-first, 2’s compliment format. The SDTO is clocked out on the falling edge of
BICK and the SDTI1 are latched on the rising edge of BICK. SDOS and LOOP1-0 should be set to “0” at the TDM mode.
TDM128 Mode can be set by TDM1 as show in Table10. In Double Speed Mode, the serial data of DAC (four channels;
L1, R1, L2, R2) is input to the SDTI1 pin. Other two data (L3, R3) are input to the SDTI2. TDM0 pin and TDM0 register
should be set to “H” if TDM256 Mode is selected. TDM0 pin and TDM0 register, TDM1 register should be set to “H” if
Double Speed Mode is selected in TDM128 Mode.
MS0397-E-00
Audio Serial Interface Format
Mode
Mode
Mode
10
11
4
5
6
7
8
9
0
1
2
3
TDM 1
TDM 1
TDM 1
0
0
0
0
1
1
1
1
0
0
0
0
TDM0
TDM0
TDM0
0
0
0
0
1
1
1
1
1
1
1
1
DIF1
DIF1
DIF1
0
0
1
1
0
0
1
1
0
0
1
1
Table 10. Audio data formats (TDM128 mode)
Table 9. Audio data formats (TDM256 mode)
Table 8. Audio data formats (Normal mode)
DIF0
DIF0
DIF0
0
1
0
1
0
1
0
1
0
1
0
1
24bit, Left
24bit, Left
24bit, Left
24bit, I
24bit, Left
24bit, Left
24bit, Left
24bit, Left
24bit, Left
24bit, Left
justified
justified
justified
24bit, I
24bit, I
justified
justified
justified
justified
justified
justified
SDTO
SDTO
SDTO
- 18 -
2
2
2
S
S
S
20bit, Right
24bit, Right
20bit, Right
24bit, Right
20bit, Right
24bit, Right
24bit, Left
SDTI1-3,
24bit, I
24bit, Left
24bit, Left
justified
justified
justified
24bit, I
24bit, I
DAUX
justified
justified
justified
justified
justified
justified
SDTI1
SDTI1,
SDTI2
2
2
2
S
S
S
H/L
H/L
H/L
L/H
↑
↑
↑
↓
↑
↑
↑
↓
LRCK
LRCK
LRCK
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
≥ 48fs
≥ 48fs
≥ 48fs
≥ 48fs
256fs
256fs
256fs
256fs
128fs
128fs
128fs
128fs
BICK
BICK
BICK
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
[AK4626A]
Default
2005/06